ml87v2105 Oki Semiconductor, ml87v2105 Datasheet - Page 52

• Manufacturer Part Number: ml87v2105
• Description: Video Signal Noise Reduction Ic With A Built-in 5.6 Mbit Frame Memory
• Manufacturer: Oki Semiconductor

2.2 Output Polarity Settings for the OVS, OHS and HREF Pins
OKI Semiconductor
You can reverse the polarity of the sync signals output by the OVS, OHS, and HREF pins by setting the I
settings registers OVSINV(SUB:61h-bit[0]), OHSINV(SUB:61h-bit[1]), and HREFINV(SUB:61h-bit[2]).
Effective area signal
The effective area signal is created from a synthesis of the vertical valid blanking signal (vertical valid data
period: 1, vertical blanking period: 0) and the horizontal reference signal (horizontal valid data period: 1,
horizontal blanking period: 0). It is output as a signal with valid data period: 1, blanking period: 0.
Field pulse signal
Normally, the field pulse signal detected from the IVS and IHS phases is output.
In the ITU-R BT.656 mode, an F signal separated from SAV, EAV is output.
HREFINV
Table F2-2 (3) HREF Pin Polarity
OHSINV
OVSINV
Horizontal Reference Signal
Table F2-2 (1) OVS Pin Polarity
Table F2-2 (2) OVS Pin Polarity
0
1
Figure F2-1 (3) Effective Area
0
1
0
1
Valid data period
Reverse polarity of internally
Same polarity as internally
Reverse polarity of input
Reverse polarity of input
Same polarity as input
Same polarity as input
HREF output
OVS output
OHS output
generated
generated
Blanking Period
PEDL87V2105-02
ML87V2105
52/103
2
C-bus