ml87v2105 Oki Semiconductor, ml87v2105 Datasheet - Page 8
![no-image](/images/no-image-200.jpg)
ml87v2105
Manufacturer Part Number
ml87v2105
Description
Video Signal Noise Reduction Ic With A Built-in 5.6 Mbit Frame Memory
Manufacturer
Oki Semiconductor
Datasheet
1.ML87V2105.pdf
(103 pages)
- Current page: 8 of 103
- Download datasheet (474Kb)
DC Characteristics
AC Characteristics
*1: ( ) indicates the input internal system clock cycle.
Note 1: Measurement conditions
Note 2: .When writing input data to the memory, compensation is applied from the second input system
Note 3: .When reading output data from the memory, compensation is applied from the second output
OKI Semiconductor
H level input voltage
L level input voltage
Schmitt trigger threshold voltage
(SDA, SCL, IVS, IHS, RESET)
Schmitt trigger threshold voltage
(SDA, SCL, IVS, IHS, RESET)
Hysteresis voltage width
H level input current (pull-down)
Input leakage current
H level output voltage (other than SDA)
L level output voltage (other than SDA)
L level output voltage (N-Ch.OD)
(SDA)
Output leakage current
Supply current (during operation)
Supply current (during standby)
ICLK clock cycle time
ICLK clock cycle time
ICLK clock duty ratio
ICLK input set-up time
ICLK input hold time
ICLK output delay time
CLKO delay time
Data through time
Output comparison level: V
Input voltage level: V
vertical synchronization signal when V
RESET = 1. (Due to memory initialization, the first data for the first field is not compensated.)
system vertical synchronization signal when V
when RESET = 1. (Due to memory initialization, the first data for the first field is not compensated.)
Parameter
Parameter
IH
= 3.0 V, V
OH
= V
IL
DD
Symbol
Symbol
= 0.0 V
dt
V
t
t
t
V
I
I
t
V
t
/2 , V
t
DIDO
V
V
V
V
I
ICLK
ICLK
t
CKD
V
DD1
DD2
IISU
I
I
IOD
OOL
OL
ICLK
IIH
IH
OH
IL
OL
IH
IL
t+
t–
h
DD
OL
reaches 3.0 V after the power is turned on, and when
= V
C
C
L
L
DD
ITU-R BT.656 mode
DD
= 30 pF (IICLK output)
= 30 pF (ICLK output)
50 k Pull Down
16-bit input mode
Output disabled
ICLK: 29.5 MHz
Output disabled
8-bit input mode
Input pin = V
0
reaches 3.0 V after the power is turned on, and
/2
I
OH
I
I
C
C
Condition
OL
OL
Condition
L
L
V
= –4 mA
TTL
= 4 mA
= 4 mA
= 30 pF
= 30 pF
out
—
—
—
—
—
—
—
—
V
DD
IL
V
V
V
DD
DD
DD
Min.
–0.3
–10
–10
0.1
2.4
Min.
20
—
—
x 0.25 V
66
33
40
0
0
x 0.7
x 0.1
5
3
5
2
2
5
PEDL87V2105-02
V
V
Max.
DD
DD
Max.
DD
—
—
60
—
—
25
25
20
20
200
V
ML87V2105
0.4
0.4
(Ta = 0 to 70 C)
(Ta = 0 to 70 C)
10
10
80
x 0.75
—
—
5
+0.3
x 0.3
DD
Unit
ns
ns
ns
ns
ns
ns
ns
ns
%
Unit
mA
mA
V
V
V
V
V
V
V
V
8/103
A
A
A
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