ml87v2105 Oki Semiconductor, ml87v2105 Datasheet - Page 96

• Manufacturer Part Number: ml87v2105
• Description: Video Signal Noise Reduction Ic With A Built-in 5.6 Mbit Frame Memory
• Manufacturer: Oki Semiconductor

OKI Semiconductor
SUB_ADDRESS = 72h(W/R): Other settings
2.5.2 Other mode settings
PASS Initial value: 0; Setting range: 0 to 1
OUTDS Initial value: 0; Setting range: 0 to 1
RLTG Initial value: 0; Setting range: 0 to 1
Register name
DATA_BIT
Sets data through mode.
The input pin is directly connected to the output pin. At this time, there is a delay generated equal to the
time it takes for the output data to pass through the internal circuitry.
Sets to disable forcibly all outputs (YO[7:0], CO[7:0], OVS, OHS, HREF, CLKO).
Sets the register setting synchronous mode. Normally 0, used only for tests.
OUTDS
RLTG
BIT7
0
1
Table R2-5-2 (1) Data Through Mode Setting
Table R2-5-2 (2) All Outputs Disable Setting
Table R2-5-2 (3) Register Set Mode Setting
RLTG
0
1
(Reserved) (Reserved) (Reserved) (Reserved) (Reserved)
PASS
Dependent on other settings (R656, DISEL, DOSEL)
BIT6
0
1
BIT5
IVS, OVS synchronous
When I
Normal operation
Data reflection
All output pins
Data through
BIT4
Disable
Mode
2
C-bus is set
BIT3
BIT2
OUTDS
BIT1
PEDL87V2105-02
ML87V2105
PASS
BIT0
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