92hd89d Integrated Device Technology, 92hd89d Datasheet - Page 16

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92hd89d

Manufacturer Part Number
92hd89d
Description
Eight Channel Hd Audio Codec Low Power Optimized For Ecr15b And Eup
Manufacturer
Integrated Device Technology
Datasheet

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92HD89D
Eight channel HD Audio codec optimized for low power
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
2.1.2.
2.1.3.
2.1.4.
Vref_Out
Ports A, B, C (48-pin package only), & E support Vref_Out pins for biasing electret cartridge micro-
phones. Settings of 80% AVDD, 50% AVDD, GND, and Hi-Z are supported. Attempting to program a
pin widget control with a reserved or unsupported value will cause the associated Vref_Out pin to
assume a Hi-Z state and the pin widget control Vref_En field will return a value of ‘000’ (Hi-Z) when
read.
Jack Detect
Plugs inserted to a jack are detected using SENSE inputs as described in the tables below. Per
ECR15-B, the detection circuit operates when the CODEC is in D0 - D3 and can also operate if both
the CODEC and Controller are in D3 (no bus clock.) Jack detection requires that all supplies (analog
and digital) are active and stable. When AVDD is not present, the value reported in the pin widget is
invalid.
When the HD Audio bus is in a low power state (reset asserted and clock stopped) the CODEC will
generate a Power State Change Request when a change in port connectivity is sensed and then
generate an unsolicited response after the HD Audio link has been brought out of a low power state
and the device has been enumerated. Per ECR015-B, this will take less than 10mS.
The following table summarizes the proper resistor tolerances for different analog supply voltages.
See reference design for more information on Jack Detect implementation.
SPDIF Output
Both SPDIF Outputs can operate at 44.1kHz, 48kHz, 88.2kHz, 96kHz and 192KHz as defined in the
Intel High Definition Audio Specification with resolutions up to 24 bits. This insures compatibility with
Resistor
39.2K
20.0K
10.0K
2.49K
5.11K
Voltage (+/- 5%)
AVdd Nominal
4.75 or 5VV
Resistor
39.2K
20.0K
10.0K
5.11K
2.49K
Pull-up to AVDD
SENSE_A
PORT A
PORT C
PORT D
PORT B
Table 4. 48pin Jack Detect
Table 5. 40pin Jack Detect
Resistor Tolerance
Pull-up to AVDD
SENSE_A
PORT A
PORT B
PORT C
PORT D
Pull-Up
1%
16
Pull-up to AVDD
SPDIFOUT0
SENSE_B
PORT G
PORT E
PORT F
Resistor Tolerance
Pull-up to AVDD
SENSE_A/B/C
SENSE_B
PORT G
PORT E
PORT F
PORT H
1%
SPDIFOUT1(pin40)
Pull-up to AVDD
SPDIFOUT0
SENSE_C
DMIC0
DMIC1
V1.0 04/10
92HD89D

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