92hd89d Integrated Device Technology, 92hd89d Datasheet - Page 65

• Manufacturer Part Number: 92hd89d
• Description: Eight Channel Hd Audio Codec Low Power Optimized For Ecr15b And Eup
• Manufacturer: Integrated Device Technology

92HD89D
Eight channel HD Audio codec optimized for low power
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Please note that the 40QFN package version only supports GPIO0, GPIO1 and GPIO2.
Field Name
Rsvd
Mask6
Mask5
Mask4
Mask3
Mask2
Mask1
Mask0
Reg
Get
Set
7.4.13. AFG (NID = 01h): GPIODir
Byte 4 (Bits 31:24)
Bits
31:7
Reserved.
6
Enable for GPIO6: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
5
Enable for GPIO5: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
4
Enable for GPIO4: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
3
Enable for GPIO3: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
2
Enable for GPIO2: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
1
Enable for GPIO1: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
0
Enable for GPIO0: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
Byte 3 (Bits 23:16)
R/W
R
RW
RW
RW
RW
RW
RW
RW
F1700h
Default
00000000h
0h
0h
0h
0h
0h
0h
0h
65
Byte 2 (Bits 15:8)
Reset
N/A (Hard-coded)
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
Byte 1 (Bits 7:0)
717h
V1.0 04/10
92HD89D