92hd89d Integrated Device Technology, 92hd89d Datasheet - Page 34

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92hd89d

Manufacturer Part Number
92hd89d
Description
Eight Channel Hd Audio Codec Low Power Optimized For Ecr15b And Eup
Manufacturer
Integrated Device Technology
Datasheet

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92HD89D
Eight channel HD Audio codec optimized for low power
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
D3cold
Power
D0-D3
D0-D3
State
AFG
D1
D0
D2
D2
D3
D3
D4
D5
1.PC_Beep is automatically routed to ports A, B, D, and F after power-on reset while link reset is active and EAPD will be high
to enable an external amplifier. This may be disabled using a vendor specific verb. If the automatic beep path is disabled,
beep will still be supportedwith EAPD active in link reset if Analog Beep is manually enabled and at least one port is config-
ured as an output before entering link reset. If the automatic Beep routing is disabled and Analog Beep has not been man-
ually configured before entering link reset, then the EAPD pin will retain its current state.
HP SD
1.EAPD bit is set to one by default but the EAPD state is 0 after power-on reset because the function group
De-Asserted (High)
De-Asserted (High)
De-Asserted (High)
De-Asserted (High)
De-Asserted (High)
De-Asserted (High)
De-Asserted (High)
De-Asserted (High)
De-Asserted (High)
0
0
1
1
Asserted (Low)
Asserted (Low)
is not in D0. The state after a single or double function group reset will be compliant with ECR15b.
RESET#
enabled
Analog
BEEP
1.When pin is enabled as Open Drain or CMOS output.
0
1
Note: NOTE: Each Headphone port has its own configuration bits for SD, SD MODE, and SD INV.
HP SD
MODE
1
1
0
1
Forced to low when in D2
unless port is enabled as
Forced low in D2 or D3
EAPD Pin value
HP SD INV
PC_BEEP
Enabled
Table 14. Headphone Amp Enable Configuration
Disabled
Disabled
Disabled
Enabled
Enabled
Analog
NA
NA
output
Table 15. EAPD Analog PC_Beep behavior
or D3
1
1
-
-
-
-
-
1
Table 16. EAPD Behavior
Port Power
EAPD Pin
1
D0-D1
D0-D2
D0-D2
D0-D3
D0-D3
State
State
NA
NA
0
1
-
-
-
-
-
-
and port EAPD=1 to allow PC_Beep support in D2
Power state is ignored if port is enabled as output
amplifier is shut down when pin or function group
power state is D2 or D3 independent of value in
Follows description in HD Audio spec. External
34
Amplifier is active
Amplifier is in a low power state
Amplifier follows pin/function group power stateand will
mute when disabled
Amplifier follows pin/function group power state and will
enter a low power state when disabled
Active - Pin reflects EAPD bit unless held low by external source.
Active - Pin reflects EAPD bit unless held low by external source.
Active - EAPD Pin high if any port EAPD bit =1 and that port also
Active - EAPD Pin high if any port EAPD bit=1 and that port also
Active high immediately after power on, otherwise the previous
The previous state is retained across FG and link reset events
state is retained across FG and link reset events
Description
Pin forced low to disable external amp
Pin forced low to disable external amp
Pin forced low to disable external amp
Pin forced low to disable external amp
EAPD bit.
Headphone Amp State
and D3
enabled as output.
enabled as output.
Pin Behavior
Pin Hi-Z (off)
V1.0 04/10
92HD89D

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