uaa3500hl NXP Semiconductors, uaa3500hl Datasheet - Page 2

• Manufacturer Part Number: uaa3500hl
• Description: Pager Receiver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FEATURES
APPLICATIONS
GENERAL DESCRIPTION
The UAA3500HL is a one-chip pager receiver complying
with POCSAG, FLEX
performs in accordance with specifications in the
ORDERING INFORMATION
2000 Jan 18
UAA3500HL
TYPE NUMBER
10 to +55 C temperature range.
Double frequency conversion, zero-IF receiver with:
– Configurable in all paging bands (130 to 930 MHz)
– Low noise amplifier featured with four step Automatic
– Down-conversion mixers
– On-chip, zero-IF channel filter
– I/Q, non-demodulated outputs
– Highpass filters to remove DC offsets.
External Voltage Controlled Oscillator (VCO):
– Both Local Oscillators (LOs) derived from the VCO.
FLEX
Remote control terminals.
Pager receiver
Gain Control (AGC)
TM
, ERMES and POCSAG pagers
LQFP48
TM
NAME
and ERMES standards. The IC
plastic low profile quad flat package; 48 leads; body 7
2
DESCRIPTION
The UAA3500HL contains a front-end receiver, which can
be configured through external components for any
frequency band between 130 and 930 MHz. The back-end
receiver consists of the channel filter and limiters. An
external VCO ensures the Local Oscillator (LO) for the
front-end. Designed in an advanced BiCMOS process, it
combines high performance with low-power consumption
and a high degree of integration, thus reducing external
component costs and total radio size.
Its first advantage is to remove the expensive SAW filter
necessary in a superhet architecture, replacing it by an
integrated, elliptic channel filter that provides 70 dB
adjacent channel rejection. The receive front-end section
consists of a low-noise amplifier that drives mixers through
an external LC image rejection filter. The output drives the
I and Q second mixers, whose outputs are at zero
frequency. The receiver back-end section consists of
filters (channel filtering), limiters (limited output required)
and high-pass filters (DC block) to remove DC offsets.
Outputs are I and Q, undemodulated signals.
Its second advantage is to provide the two LO signals from
one VCO only, tuned by a PLL. An on-chip frequency
divider-by-2 and buffers provide the LO sources.
Its third advantage is to provide two voltage regulators,
allowing to obtain 1.0 and 1.8 V regulated voltages.
PACKAGE
7
1.4 mm
Preliminary specification
UAA3500HL
SOT313-2
VERSION