scn68681 NXP Semiconductors, scn68681 Datasheet - Page 24

• Manufacturer Part Number: scn68681
• Description: Dual Asynchronous Receiver/transmitter Duart
• Manufacturer: NXP Semiconductors

Philips Semiconductors
while in the enabled state and underrun condition, is immediately
disabled after a single character is loaded to the transmit holding
register, that character will not be sent.
In general, when it is desired to disable the transmitter before the
last character is sent AND the TxEMT bit is set in the status register
(TxEMT is always set if the transmitter has underrun or has just
Table 6. Baud Rates Extended
NOTE:
Each read on address H‘2’ will toggle the baud rate test mode. When in the BRG test mode, the baud rates change as shown to the left. This
change affects all receivers and transmitters on the DUART. See “Extended baud rates for SCN2681, SCN68681, SCC2691, SCC2692,
SCC68681 and SCC2698B” in application notes elsewhere in this publication.
The test mode at address H‘A’ changes all transmitters and receivers to the 1x mode and connects the output ports to some internal nodes.
2004 Mar 02
Dual asynchronous receiver/transmitter (DUART)
Reset can also be accomplished easily by first exiting the wake-up mode (MR1[4:3] = 00 or 01 or 10), then issuing a receiver software or
Receiver Reset in the Normal Mode (Receiver Enabled)
Reset can be accomplished easily by issuing a receiver software or hardware reset followed by a receiver enable. All receiver data,
status and programming will be preserved and available before reset. The reset will NOT affect the programming.
Receiver Reset in the Wake-Up Mode (MR1[4:3] = 11)
hardware reset followed by a wake-up re-entry (MR1[4:3] = 11). All receiver data, status and programming will be preserved and
available before reset. The reset will NOT affect other programming.
The reason for this is the receiver is partially enabled when the parity bits are at ‘11’. Thus the receiver disable and reset is bypassed by
the partial enabling of the receiver.
CSR[7:4]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
ACR[7] = 0
I/O2 – 16X
I/O2 – 1X
38.4K
134.5
1,200
1,050
2,400
4,800
7,200
9,600
Timer
110
200
300
600
50
Normal BRG
ACR[7] = 1
I/O2 – 16X
I/O2 – 1X
19.2K
134.5
1,200
2,000
2,400
4,800
1,800
9,600
Timer
150
300
600
110
75
24
been enabled), be sure the TxRDY bit is active immediately before
issuing the transmitter disable instruction. TxRDY sets at the end of
the “start bit” time. It is during the start bit that the data in the
transmit holding register is transferred to the transmit shift register.
Non-standard baud rates are available as shown in Table 6 below,
via the BRG Test function.
ACR[7] = 0
I/O2 – 16X
I/O2 – 1X
115.2K
19.2K
28.8K
57.6K
57.6K
57.6K
38.4K
4,800
1,076
1,050
4,800
9,600
Timer
880
BRG Test
SCN68681
ACR[7] = 1
I/O2 – 16X
I/O2 – 1X
115.2K
14.4K
28.8K
57.6K
57.6K
14.4K
19.2K
7,200
1,076
2,000
4,800
9,600
Timer
880
Product data
SD00097