th50vsf2580 TOSHIBA Semiconductor CORPORATION, th50vsf2580 Datasheet - Page 5

• Manufacturer Part Number: th50vsf2580
• Description: Sram And Flash Memory Mixed Multi-chip Package
• Manufacturer: TOSHIBA Semiconductor CORPORATION

COMMAND SEQUENCES
Read/Reset
Read/Reset
ID Read
Auto-Program
Program Suspend
Program Resume
Auto Chip
Erase
Auto Block
Erase
Block Erase Suspend
Block Erase Resume
Block Protect
Verify Block
Protect
Fast Program
Set
Fast Program
Fast Program Reset
Hidden ROM
Mode Entry
Hidden ROM
Program
Hidden ROM
Erase
Hidden ROM
Mode Exit
Query
Command
Notes: The system should generate the following address patterns:
SEQUENCE
COMMAND
Word Mode: 555H or 2AAH on address pins A10~A0
Byte Mode: AAAH or 555H on address pins A10~A0, A12F
DQ8~DQ15 are ignored in Word Mode.
(1) RA: Read Address
(2) RD: Read Data
(3) BK: Bank Address = A20~A15
(4) IA:
(5) ID: ID Data
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Bank Address and ID Read Address (A6, A1, A0)
Bank Address = A20~A15
Manufacturer Code = (0, 0, 0)
Device Code = (0, 0, 1)
0098H - Manufacturer Code
009AH - Device Code (TH50VSF2580AASB)
009CH - Device Code (TH50VSF2581AASB)
0001H - Protected Block
CYCLES
WRITE
REQ’D
BUS
1
3
3
4
1
1
6
6
1
1
4
3
3
2
2
3
4
6
4
2
BK
BK
XXXH
AAAH
AAAH
AAAH
AAAH
AAAH
XXXH
AAAH
AAAH
XXXH
XXXH
AAAH
AAAH
AAAH
AAAH
WRITE CYCLE
BK
BK
BK
BK
Addr.
555H
555H
555H
555H
555H
555H
555H
555H
555H
555H
555H
AAH
55H
FIRST BUS
(3)
(3)
(3)
(3)
(3)
(3)
+
+
Data
F0H
AAH
AAH
AAH
B0H
AAH
AAH
B0H
AAH
AAH
A0H
AAH
AAH
AAH
AAH
30H
30H
60H
90H
98H
BPA
CA
2AAH
2AAH
2AAH
2AAH
2AAH
2AAH
2AAH
XXXH
2AAH
2AAH
2AAH
2AAH
555H
555H
555H
555H
555H
555H
555H
PA
555H
555H
555H
555H
Addr.
WRITE CYCLE
SECOND BUS
(11)
(6)
(9)
F0H
CD
PD
Data
55H
55H
55H
55H
55H
60H
55H
55H
55H
55H
55H
55H
(12)
(7)
(13)
WRITE CYCLE
BK
BK
BK
BK
AAAH
AAAH
AAAH
AAAH
AAAH
XXXH
AAAH
AAAH
AAAH
AAAH
AAAH
AAAH
Addr.
555H
555H
555H
555H
555H
555H
555H
555H
555H
555H
555H
THIRD BUS
(10) BPD: Verify Data
(11) CA: CFI Address
(12) CD: CFI Data
(13) F0H: 00H is valid too
(3)
(3)
(3)
(3)
(6) PA: Program Address
(7) PD: Program Data
(8) BA: Block Address = A20~A12
(9) BPA: Block Address and ID Read Address (A6, A1, A0)
• Byte mode when V
• Write mode when V
• Valid addresses are A10~A0 when a command is entered.
+
+
+
+
are A21~A0
are A20~A0
Data
F0H
90H
A0H
80H
80H
40H
90H
20H
88H
A0H
80H
90H
Block Address = A20~A12
ID Read Address = (0, 1, 0)
BPA
BPA
AAAH
AAAH
AAAH
XXXH
RA
Addr.
PA
555H
555H
PA
555H
IA
WRITE CYCLE
FOURTH BUS
(4)
(6)
(6)
(1)
(9)
(9)
TH50VSF2580/2581AASB
BPD
BPD
RD
PD
PD
Data
ID
AAH
AAH
AAH
00H
IL
IH
(5)
(2)
(7)
(7)
(10)
(10)
is inputted to CIOF, and addresses
is inputted to CIOF, and addresses
2AAH
2AAH
2AAH
555H
555H
555H
WRITE CYCLE
Addr.
FIFTH BUS
2001-10-26 5/50
Data
55H
55H
55H
AAAH
555H
BA
BA
WRITE CYCLE
Addr.
SIXTH BUS
(8)
(8)
Data
10H
30H
30H