lrs1331 Sharp Microelectronics of the Americas, lrs1331 Datasheet - Page 10

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lrs1331

Manufacturer Part Number
lrs1331
Description
Stacked Chip Flash Memory Sram
Manufacturer
Sharp Microelectronics of the Americas
Datasheet

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LRS1331
DC CHARACTERISTICS
NOTES:
1. Reference values at V
2. CMOS inputs are either V
3. Automatic Power Savings (APS) feature is placed automatically
10
Input leakage current
Output leakage current
F-V
F-V
S-V
Input LOW Voltage
Input HIGH Voltage
Output LOW Voltage
Output HIGH Voltage (CMOS)
F-V
F-V
Write or Lock-Bit Configuration Operations
F-V
T
are either V
power save mode that addresses not switching more than 300 ns
while read mode.
CCW
CC
CCW
CCW
CC
CC
A
= -25°C to + 85°C, V
Lockout Voltage
during Block Erase, Bank Erase, Word
Lockout during Normal Operations
Standby Current
Auto Power-Save Current
Reset/Power-Down Current
Read Current
Word Write or Set Lock-Bit Current
Block Erase, Full Chip Erase or
Clear Block Lock-BIts Current
Word Write Block Erase
Suspend Current
Standby or Read Current
Auto Power-Save Current
Reset/Power-Down Current
Word Write or Set Lock-Bit Current
Block Erase, Full Chip Erase or
Clear Block Lock-Bits Current
Word Write or Block Erase
Suspend Current
Standby Current
Operation Current
IL
PARAMETER
or V
IH
.
CC
= 3.0 V and T
CC
± 0.2 V or GND ± 0.2 V. TTL inputs
CC
= 2.7 V to 3.6 V
A
= +25°C.
SYMBOL
I
V
I
I
V
I
CCWWS
I
I
I
CCWAS
I
I
CCWES
I
I
CCWW
V
V
I
CCWS
CCWS
CCWR
CCWD
CCWE
CCWLK
I
CCAS
I
I
I
CCES
I
I
CCWH
I
V
CCW
I
CCS
CCD
CCR
CCE
I
V
SB1
CC1
CC2
V
I
OH1
LKO
LO
SB
LI
OL
IL
IH
V
V
F-CE = F-RP = F-V
F-WP = F-V
or F-GND ± 0.2 V
F-CE = F-RP = V
F-CE = GND ± 0.2 V
F-RP = F-GND ± 0.2 V,
I
CMOS input, F-CE = F-GND,
f = 5 MHz, I
TTL input, F-CE = F-GND,
f = 5 MHz, I
F-V
F-V
F-CE = V
F-V
F-V
F-CE = GND ± 0.2 V
F-RP = F-GND ± 0.2 V
F-V
F-V
F-V
S-CE
or S-CE
S-CE
S-CE
V
S-CE
V
t
I
I
OUT
CYCLE
OL
OH
IN
OUT
IH
IN
, t
CCW
CCW
PP
PP
CCW
CCW
CCW
= 0.5 mA
= V
= S-V
= -0.5 mA
(F-RY/BY) = 0 mA
CYCLE
1
1
1
1
= V
, S-CE
≤ F-V
> F-V
= V
= V
= 0.2 V, S-CE
CC
= 1 µs, I
2
= V
= V
= V
= V
= V
CC
IH
≤ 0.2 V
CC
IH
IL
or GND
OUT
OUT
, S-CE
= MIN., I
CC
CCWH
CCWH
CCWH
CCWH
CCWH
CC
CC
or GND
CONDITION
- 0.2 V, or 0.2 V
2
or S-CE
≥ S-V
± 0.2 V
I/O
4. Includes F-RY/BY.
5. Block erases and word writes are inhibited when F-V
= 0 mA
= 0 mA
IH,
2
= 0 mA
and not guaranteed in the range between V
V
CC
F-WP = V
= V
CC
2
I/O
CCWH
2
= S-V
± 0.2 V
= V
IH
= 0 mA
- 0.2 V
, V
IL
(MIN.), and above V
CC
IN
IH
= V
- 0.2 V,
or V
Stacked Chip (16M Flash & 4M SRAM)
IL
or
IL
MIN.
-1.5
-1.5
-0.3
2.2
2.2
2.7
2.0
CCWH
TYP.
0.2
0.1
0.1
15
±2
10
12
10
2
2
2
5
4
1
8
(MAX.).
1
V
MAX.
+1.5
+1.5
±15
200
200
0.6
CC
0.2
0.4
1.5
3.6
15
15
15
25
30
17
17
40
25
15
45
2
6
5
3
8
5
+
CCWLK
UNIT
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
V
V
V
V
V
V
V
CCW
Data Sheet
(MAX.) and
≤ V
NOTES
2, 3
2, 3
CCWLK
2
2
2
2
2
2
4
4
5

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