lrs1331 Sharp Microelectronics of the Americas, lrs1331 Datasheet - Page 21
lrs1331
Manufacturer Part Number
lrs1331
Description
Stacked Chip Flash Memory Sram
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LRS1331.pdf
(26 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LRS1331
Manufacturer:
SHARP
Quantity:
20 000
Company:
Part Number:
lrs1331B
Manufacturer:
TI
Quantity:
2 879
Part Number:
lrs1331B
Manufacturer:
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Quantity:
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Stacked Chip (16M Flash & 4M SRAM)
Data Sheet
NOTES:
1. A write occurs during the overlap of a LOW S-CE
2. t
3. t
4. t
5. t
6. During this period, DQ pins are in the output state, therefore the input signals of
and S-WE going LOW. A write ends at the earliest transition among S-CE
S-CE
write to the end of write.
opposite phase to the outputs must not be applied.
A write begins at the latest transition among S-CE
of write.
write ends as S-CE
CW
BW
AS
WR
is measured from the address valid to the beginning of write.
S-UB, S-LB
is measured from the time of going LOW S-UB or LOW S-LB to the end of write.
is measured from the later of S-CE
is measured from the end of write to the address change. t
ADDRESS
2
going LOW and S-WE going HIGH. t
S-CE
S-CE
S-WE
D
D
OUT
IN
1
2
1
going HIGH, S-CE
Figure 10. Write Cycle Timing Diagram (S-CE Controlled)
1
(NOTE 4)
2
going LOW or S-CE
going LOW or S-WE going HIGH.
t
AS
WP
is measured from the beginning of
1
, a HIGH S-CE
1
going LOW, S-CE
2
going HIGH to the end
HIGH IMPEDANCE
WR
t
2
AW
and a LOW S-WE,
applied in case a
(NOTE 1)
(NOTE 6)
2
t
WP
t
WC
going HIGH
(NOTE 2)
(NOTE 3)
1
t
going HIGH,
CW
t
BW
t
DW
Data Valid
(NOTE 5)
t
t
WR
WR
t
DH
LRS1331
1331-10
21