m470l6423ck0 Samsung Semiconductor, Inc., m470l6423ck0 Datasheet
m470l6423ck0
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m470l6423ck0 Summary of contents
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... M470L6423CK0 512MB DDR SDRAM MODULE (64Mx64 based on DDP 64Mx 8 DDR SDRAM) 64bit Non-ECC/Parity 200pin DDR SDRAM SODIMM 200pin SODIMM Revision 0.0 Aug. 2001 Rev. 0.0 Aug. 2001 ...
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... M470L6423CK0 Revision History Revision 0.0 (August 2001) 1. First release. 200pin DDR SDRAM SODIMM Rev. 0.0 Aug. 2001 ...
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... M470L6423CK0 200pin DDR SDRAM SODIMM 64Mx64 200pin DDR SDRAM SODIMM based on DDP 64Mx8 GENERAL DESCRIPTION The Samsung M470L6423CK0 is 64M bit x 64 Double Data Rate SDRAM high density memory modules based on 4th gen of 256Mb DDR SDRAM respectively. The Samsung M470L6423CK0 consists of eight CMOS DDP ...
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... M470L6423CK0 FUNCTIONAL BLOCK DIAGRAM S1 CKE1 S0 CKE0 DQS0 DQS S0 S1 DM0 DM CKE0 CKE1 DQ0 I/0 0 DQ1 I/0 1 DQ2 I DQ3 I/0 3 DQ4 I/0 4 DQ5 I/0 5 DQ6 I/0 6 DQ7 I/0 7 DQS1 DQS S1 S0 DM1 DM CKE1 CKE0 DQ8 I/0 0 DQ9 I/0 1 DQ10 I DQ11 I/0 3 DQ12 I/0 4 DQ13 I/0 5 DQ14 I/0 6 DQ15 I/0 7 DQS2 DQS S0 S1 DM2 DM CKE0 CKE1 ...
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... M470L6423CK0 ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Voltage on V supply relative to Vss DDQ Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. ...
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... M470L6423CK0 DDR SDRAM SPEC Items and Test Conditions Recommended operating conditions Unless Otherwise Noted, T Conditions Operating current - One bank Active-Precharge; tRC=tRCmin;tCK=100Mhz for DDR200, 133Mhz for DDR266A & DDR266B; DQ,DM and DQS inputs changing twice per clock cycle; address and control inputs changing once per clock cycle Operating current - One bank operation ...
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... M470L6423CK0 DDR SDRAM module I spec table DD A2(DDR266@CL=2) Symbol typical IDD0 T.B.D IDD1 T.B.D IDD2P T.B.D IDD2F T.B.D IDD2Q T.B.D IDD3P T.B.D IDD3N T.B.D IDD4R T.B.D IDD4W T.B.D IDD5 T.B.D Normal T.B.D IDD6 Low power T.B.D IDD7A T.B Module was calculated on the basis of component DD < Detailed test conditions for DDR SDRAM IDD1 & IDD7A > ...
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... M470L6423CK0 DD7A I : Operating current: Four bank operation 1. Typical Case : Vdd = 2.5V, T=25’ Worst Case : Vdd = 2.7V, T= 10’ Four banks are being interleaved with tRC(min), Burst Mode, Address and Control inputs on NOP edge are not changing. lout = 0mA 4. Timing patterns - DDR200(100Mhz, CL=2) : tCK = 10ns, CL2, BL=4, tRRD = 2*tCK, tRCD= 3*tCK, Read with autoprecharge ...
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... M470L6423CK0 AC OPERATING TEST CONDITIONS Parameter Input reference voltage for Clock Input signal maximum peak swing Input Levels Input timing measurement reference level Output timing measurement reference level Output load condition Output Input/Output CAPACITANCE Parameter Input capacitance Input capacitance(CKE ...
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... M470L6423CK0 AC Timming Parameters & Specifications Parameter Row cycle time Refresh row cycle time Row active time RAS to CAS delay Row precharge time Row active to Row active delay Write recovery time Last data in to Read command Col. address to Col. address delay CL=2.0 Clock cycle time CL=2 ...
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... M470L6423CK0 Parameter Mode register set cycle time DQ & DM setup time to DQS DQ & DM hold time to DQS DQ & DM input pulse width Power down exit time Exit self refresh to write command Exit self refresh to bank active command Exit self refresh to read command 64Mb, 128Mb ...
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... M470L6423CK0 6. Input Setup/Hold Slew Rate Derating Input Setup/Hold Slew Rate (V/ns) 0.5 0.4 0.3 This derating table is used to increase t based on the lesser of AC-AC slew rate and DC-DC slew rate. 7. I/O Setup/Hold Slew Rate Derating I/O Setup/Hold Slew Rate (V/ns) 0.5 0.4 0.3 This derating table is used to increase t based on the lesser of AC-AC slew rate and DC-DC slew rate. ...
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... M470L6423CK0 Command Truth Table COMMAND Register Extended MRS Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Exit Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable Column Address ...
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... M470L6423CK0 PACKAGE DIMENSIONS 0.16 0.039 (4.00 0.10) 1 0.086 0.456 2.15 11.40 0.07 (1.8) 0.098 2.45 2 0.150 Max (3.80 Max) 0.04 0.0039 (1.00 0.10) Tolerances : .006(.15) unless otherwise specified The used device is DDP 64Mx8 SDRAM, TSOP SDRAM Part No. : K4H510838C-KC/L 200pin DDR SDRAM SODIMM 2.70 (67.60) 2.50 (63.60 1.896 (47.40) 0.17 (4.20) 0.096 (2.40 0.16 0.0039 (4.00 0.10) 0.04 0.0039 (1.00 0.1) Detail Z Units : Inches (Millimeters) Full R 2x 199 2- 0 ...