hys64d320x0edl-5-d Qimonda, hys64d320x0edl-5-d Datasheet - Page 15

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hys64d320x0edl-5-d

Manufacturer Part Number
hys64d320x0edl-5-d
Description
200-pin Small Outline Dual -in-line Memory Modules
Manufacturer
Qimonda
Datasheet
1) 0 °C ≤
2) DDR400 conditions apply for all clock frequencies above 166 MHz
3) Under all conditions,
4) Peak to peak AC noise on
5)
6) Inputs are not recognized as valid until
7)
8) The ratio of the pull-up current to the pull-down current is specified for the same temperature and voltage, over the entire temperature and
9) Values are shown per pin.
Rev. 0.60, 2008-05
05282008-IARQ-5WHU
Parameter
Input High (Logic1) Voltage
Input Low (Logic0) Voltage
Input Voltage Level, CK and
CK Inputs
Input Differential Voltage,
CK and CK Inputs
VI-Matching Pull-up Current
to Pull-down Current
Input Leakage Current
Output Leakage Current
Output High Current, Normal
Strength Driver
Output Low Current, Normal
Strength Driver
V
must track variations in the DC level of
V
voltage range, for device drain to source voltage from 0.25 to 1.0 V. For a given output, it represents the maximum difference between
pull-up and pull-down drivers due to process variation.
TT
ID
is the magnitude of the difference between the input level on CK and the input level on CK.
is not applied directly to the device.
T
A
≤ 70 °C;
V
DDQ
V
DDQ
= 2.5 V ± 0.2 V,
must be less than or equal to
V
REF
Symbol
V
V
V
V
V
I
I
I
I
I
OZ
OH
OL
may not exceed ± 2%
IH(DC)
IL(DC)
IN(DC)
ID(DC)
I
Ratio
V
V
V
V
REF
REF
TT
DD
.
is a system supply for signal termination resistors, is expected to be set equal to
stabilizes.
= +2.5 V ± 0.2 V;
Min.
V
–0.3
–0.3
0.36
0.71
–2
–5
–16.2
16.2
REF
+ 0.15
V
REF.DC
V
DD
.
.
Typ.
V
Values
REF
15
is also expected to track noise variations in
Max.
V
V
V
V
1.4
2
5
DDQ
REF
DDQ
DDQ
– 0.15
+ 0.3
+ 0.3
+ 0.6
Small Outline DDR SDRAM Modules
Unit Note/Test Condition
V
V
V
V
μA
μA
mA
mA
HYS64D[32/64]0x0EDL–[5/6]–D
Advance Internet Data Sheet
6)
6)
6)
6)7)
8)
Any input 0 V ≤ V
other pins not under test = 0 V
DQs are disabled; 0 V ≤ V
V
V
V
DDQ
OUT
OUT
=
= 0.35 V
9)
1.95 V
V
DDQ
.
IN
≤ V
1)
V
REF
DD
, and
; All
OUT
9)

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