hys64d320x0edl-5-d Qimonda, hys64d320x0edl-5-d Datasheet - Page 3

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hys64d320x0edl-5-d

Manufacturer Part Number
hys64d320x0edl-5-d
Description
200-pin Small Outline Dual -in-line Memory Modules
Manufacturer
Qimonda
Datasheet
1
This chapter contains features and the description.
1.1
• Non-parity 200-Pin Small Outline Dual-In-Line Memory
• One rank 32M × 64, two ranks 64M × 64 module
• JEDEC standard Double Data Rate Synchronous DRAMs
• Single +2.5 V (± 0.2 V) power supply and +2.6 V (± 0.1 V)
• Built with 512 Mbit DDR SDRAMs organised as ×16 in
1.2
The
HYS64D[32/64]0x0EDL–6–D are industry standard 200-Pin
Small Outline Dual-In-Line Memory Modules (SO-DIMMs)
organized as 64M ×64. The memory array is designed with
Double Data Rate Synchronous DRAMs (DDR SDRAM). A
variety of decoupling capacitors are mounted on the PC
board. The DIMMs feature serial presence detect based on a
Rev. 0.60, 2008-05
05282008-IARQ-5WHU
Part Number Speed Code
Speed Grade
max. Clock
Frequency
Modules
organization
(DDR SDRAM)
for DDR400
packages P–TSOPII–66
HYS64D[32/64]0x0EDL–5–D
Component
Module
@CL3
@CL2.5
@CL2
Overview
Features
Description
f
f
f
CK3
CK2.5
CK2
and
–5
DDR400B
PC3200–3033
200
166
133
3
• Programmable CAS Latency, Burst Length, and Wrap
• Auto Refresh (CBR) and Self Refresh
• All inputs and outputs SSTL_2 compatible
• Serial Presence Detect with E
• Industry standard form factor:
• Industry standard reference layout Raw Cards A
• DDR400 speed grade supported
• Gold plated contacts
serial E
128 bytes are programmed with configuration data and the
second 128 bytes are available to the customer.
Sequence (Sequential & Interleave)
67.60 mm × 31.75 mm × 3.80 mm
2
PROM device using the 2-pin I
–6
DDR333B
PC2700–2533
166
166
133
Small Outline DDR SDRAM Modules
HYS64D[32/64]0x0EDL–[5/6]–D
Performance for –5 and –6
Advance Internet Data Sheet
2
PROM
Unit
MHz
MHz
MHz
2
C protocol. The first
TABLE 1

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