mt9vddf6472phy-335 Micron Semiconductor Products, mt9vddf6472phy-335 Datasheet - Page 15
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mt9vddf6472phy-335
Manufacturer Part Number
mt9vddf6472phy-335
Description
256mb, 512mb X72, Ecc, Pll, Sr 200-pin Ddr Sodimm
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT9VDDF6472PHY-335.pdf
(26 pages)
Notes
PDF: 09005aef81eef7d4/Source: 09005aef81eef0df
DDF9C32_64x72PH_2.fm - Rev. A 1/06 EN
10. I
11. This parameter is sampled. V
12. For slew rates < 1 V/ns and ≥ to 0.5 Vns. If the slew rate is < 0.5V/ns, timing must be
13. Inputs are not recognized as valid until V
14. MIN (
1. All voltages referenced to V
2. Tests for AC timing, I
3. Outputs measured with equivalent load:
4. AC timing and I
5. The AC and DC input level specifications are as defined in the SSTL_2 Standard (i.e.,
6. V
7. V
8. I
9. Enables on-chip refresh and address counters.
Output
(V
OUT
at nominal reference/supply voltage levels, but the related specifications and device
operation are guaranteed for the full voltage range specified.
ment, but input timing is still referenced to V
and parameter specifications are guaranteed for the specified AC input levels under
normal use conditions. The minimum slew rate for the input signals used to test the
device is 1V/ns in the range between V
the receiver will effectively switch as a result of the signal crossing the AC input level,
and will remain in that state as long as the signal does not ring back above [below] the
DC input LOW [HIGH] level).
the DC level of the same. Peak-to-peak noise (non-common mode) on Vref may not
exceed ±2 percent of the DC value. Thus, from V
error and an additional ±25mV for AC noise. This measurement is to be taken at the
nearest V
resistors, is expected to be set equal to V
of V
with minimum cycle time at CL = 2 for -26A and -202, CL = 2.5 for -335 and -265 with
the outputs open.
the defined cycle rate.
MHz, T
with I/O pins, reflecting the fact that they are matched in loading.
derated:
500 mV/ns, while
uncertain. For -335, slew rates must be ≥ 0.5 V/ns.
before V
minimum absolute value for the respective parameter.
ments is the largest multiple of
DD
DD
REF
TT
)
REF
is dependent on output loading and cycle rates. Specified values are obtained
specifications are tested after the device is properly initialized, and is averaged at
is not applied directly to the device. V
is expected to equal V
V
t
RC or
TT
.
A
50
REF
30pF
t
= 25°C, V
Reference
Point
REF
IS has an additional 50ps per each 100 mV/ns reduction in slew rate from
Ω
256MB, 512MB: (x72, ECC, PLL, SR) 200-Pin DDR SODIMM
stabilizes, CKE ≤ 0.3 x V
t
bypass capacitor.
RFC) for I
DD
OUT
t
IH is unaffected. If the slew rate exceeds 4.5 V/ns, functionality is
tests may use a V
DD
(
DC
DD
, and electrical AC and DC characteristics may be conducted
) = V
measurements is the smallest multiple of
DD
15
SS
.
DD
DD
Q/2 of the transmitting device and to track variations in
t
Q/2, V
CK that meets the maximum absolute value for
= +2.5V ±0.2V, V
DD
IL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
-to-V
Q is recognized as LOW.
OUT
IL
REF
(
REF
AC
TT
(peak to peak) = 0.2V. DM input is grouped
IH
) and V
and must track variations in the DC level
REF
is a system supply for signal termination
stabilizes. Exception: during the period
swing of up to 1.5V in the test environ-
DD
(or to the crossing point for CK/CK#),
DD
IH
Q/2, Vref is allowed ±25mV for DC
Q = +2.5V ±0.2V, V
(
AC
t
).
RAS (MAX) for I
©2005 Micron Technology, Inc. All rights reserved.
t
CK that meets the
REF
DD
= V
measure-
SS
, f = 100
Notes
t
RAS.