ne56610 NXP Semiconductors, ne56610 Datasheet - Page 8

• Manufacturer Part Number: ne56610
• Description: Family Of Devices Designed To Generate A Reset Signal For A Variety Of Microprocessor And Logic Systems
• Manufacturer: NXP Semiconductors

Philips Semiconductors
TECHNICAL DESCRIPTION
The NE56610/11/12-XX devices comprise a family of devices
designed to monitor the supply voltage and output a RESET signal
whenever the supply voltage sags below an acceptable system level
or when supply voltage interruptions occur. Each of the three
devices of the family are available with a fixed detection threshold
voltage (2.5, 2.7, 2.9, 3.9, 4.2, 4.5 V). The device family is very
versatile and adaptable for a wide variety of applications.
The devices are designed to have a detection threshold hysteresis
of 50 mV typical. When the supply voltage delivered to the device
falls to the detection sense level (V
released until the supply voltage rises to the level of V
These levels are termed V
difference of V
Internally, the devices incorporate a fixed internal digital timer which,
when activated, produces a fixed internal delay before a RESET
signal is output. This delay can not be influenced externally. The
NE56510 has an internal delay of 50 ms, while the NE56611 and
NE56612 have internal delays of 100 ms and 200 ms respectively.
2003 Oct 31
System reset
H
– V
L
= V
HYS
L
V
M/R
CC
(synonymous with V
(the hysteresis voltage value).
5
1
S
), a RESET is output and not
R
R
R
S
) and V
S
Figure 16. Functional diagram
or greater.
H
, and the
R
NE56610/11/12-XX
OSC
8
Incorporating a delay in the output RESET prevents output
oscillations from occurring and helps ensure system supply voltages
are adequate and stabilized before the microprocessor is placed into
full operation. Where there is little or no delay in output RESET,
there is a possibility of output oscillations occurring, particularly
where high impedance supply sources are used.
In addition, the devices have a manual reset (M/R) pin, which when
pulled to a HIGH voltage state, forces a RESET signal at the output.
The M/R pin should always be connected to ground when manual
reset is not used.
The output of the NE56610/11/12 utilizes a low side open collector
topology, requiring the user to use an external pull-up resistor (R
to the V
disadvantage, it is an advantage in many sensitive applications. The
open drain output topology does not have the capability of sourcing
reset current to a microprocessor when both are operated from a
common supply. It is for this reason the device family offers a safe
inter-connect to a wide variety of microprocessors.
T
DELAY
R
CC
Q
power source. Although this may be regarded as a
R
R
R
NE56610/11/12-XX
4
3
2
V
GND
SUB
OUT
SL01382
RESET
Product data
PU
)