htsich56 NXP Semiconductors, htsich56 Datasheet - Page 15

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htsich56

Manufacturer Part Number
htsich56
Description
Hitag S Transponder Ic
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
HTSICH56_48_SDS
Product short data sheet
COMPANY PUBLIC
RWD:
Transponder
RWD:
Transponder:
RWD:
Transponder
RWD:
Transponder
RWD:
Transponder
WRITE BLOCK
Write data for page with page address: PADR
Write data for page with page address: PADR + 1
Write data for page with page address: PADR + 2
Write data for page with page address: PADR + 3
7.5.10 QUITE
7.5.9 WRITE BLOCK
LSByte
MSB
LSByte
MSB
LSByte
MSB
LSByte
MSB
1 0 0 1
DATA 0
DATA 0
DATA 0
DATA 0
After transmitting the WRITE BLOCK command, the Page address PADR (8 Bits) within a
Block and the 8 bit Cyclic Redundancy Check (CRC 8), the HITAG S Transponder
responds with the SOF and an acknowledge (ACK) to confirm the reception of a correct
WRITE BLOCK command. After the waiting time t
with CRC 8 Page by Page (1 to 4 Pages depending on the Page address PADR within the
corresponding block). After the programming time t
responds with a SOF and an acknowledge to confirm correct programming of each Page.
With this command a Selected HITAG S Transponder can be entered into the Quiet State.
LSB MSB
LSB MSB
LSB MSB
LSB MSB
MSB
DATA 1
DATA 1
DATA 1
DATA 1
PADR
LSB MSB
LSB MSB
LSB MSB
LSB MSB
All information provided in this document is subject to legal disclaimers.
LSB MSB
Rev. 3.0 — 12 October 2011
DATA 2
DATA 2
DATA 2
DATA 2
CRC 8
LSB MSB
LSB MSB
LSB MSB
LSB MSB
210330
LSB
MSByte
MSByte
MSByte
MSByte
DATA 3
DATA 3
DATA 3
DATA 3
EOF
LSB MSB
LSB MSB
LSB MSB
LSB MSB
HTSICH56; HTSICH48
t
wresp
CRC 8
CRC 8
CRC 8
CRC 8
wsc
prog
LSB
LSB
LSB
LSB
the RWD transmits the write data
the HITAG S Transponder
SOF
EOF
EOF
EOF
EOF
t
t
t
t
prog
prog
prog
prog
HITAG S transponder IC
ACK
01
SOF
SOF
SOF
SOF
© NXP B.V. 2011. All rights reserved.
ACK
01
ACK
01
ACK
01
ACK
01
t
wsc
15 of 21
t
t
t
wsc
wsc
wsc

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