emc646sp16ak Emlsi Inc., emc646sp16ak Datasheet - Page 62
emc646sp16ak
Manufacturer Part Number
emc646sp16ak
Description
4mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
1.EMC646SP16AK.pdf
(64 pages)
- Current page: 62 of 64
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Figure 51. Asynchronous WRITE Followed by Asynchronous READ - ADV# LOW
Note:
1. When configured for synchronous mode (BCR[15] = 0), CE# must remain HIGH for at least 5ns (t
interval. Otherwise, t
LB#/UB#
DQ[15:0]
IN/OUT
A[21:0]
ADV#
WAIT
WE#
OE#
CE#
CPH
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
IH
IL
is only required after CE#-controlled WRITEs.
High-Z
Valid Address
t
AS
t
CW
t
WP
Data
t
DH
t
WPH
t
WC
Valid Address
t
t
AW
BW
t
DW
Data
t
WR
High-Z
62
t
HZ
Note 1
t
CPH
V
V
OH
OL
CPH
t
BLZ
) to schedule the appropriate refresh
t
LZ
t
AA
Valid Address
t
OLZ
EMC646SP16AK
Don’t Care
t
OE
4Mx16 CellularRAM
Valid Output
t
t
HZ
HZ
t
Undefined
BHZ
t
OHZ
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