hcts273ms Intersil Corporation, hcts273ms Datasheet - Page 8

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hcts273ms

Manufacturer Part Number
hcts273ms
Description
Radiation Hardened Octal D Flip-flop
Manufacturer
Intersil Corporation
Datasheet
AC Timing Diagrams and Load Circuit
INPUT LEVEL
LEVEL
INPUT
VCC
VIH
VS
VIL
GND
FIGURE 1. CLOCK TO OUTPUT DELAYS AND CLOCK PULSE
PARAMETER
CP
D
FIGURE 3. DATA SET-UP AND HOLD TIMES
CP
Q
WIDTH
10%
TSU(L)
VS
AC VOLTAGE LEVELS
TR
VS
TPHL
90%
VS
TW
HCTS
VS
VS
4.50
3.00
1.30
0
0
TH(L)
TF
VS
10%
TSU(H)
VS
TPLH
VS
VS
UNITS
V
V
V
V
V
VS
VS
HCTS273MS
TH(H)
8
INPUT LEVEL
VOH
VOL
FIGURE 2. MASTER RESET PULSE WIDTH. MASTER RESET
MR
CP
Q
FIGURE 4. OUTPUT TRANSITION TIME
TO OUTPUT DELAY AND MASTER RESET TO
CLOCK RECOVERY TIME
DUT
CL = 50pF
RL = 500
FIGURE 5. AC LOAD CIRCUIT
CL
TTLH
20%
t PHL
VS
TW
VS
80%
OUTPUT
RL
Spec Number
TREM
TEST
POINT
VS
80%
VS
20%
TTHL
518642

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