mt58l64v32f Micron Semiconductor Products, mt58l64v32f Datasheet - Page 15

• Manufacturer Part Number: mt58l64v32f
• Description: 2mb 128k X 18, 64k X 32/36 Flow-through Syncburst Sram
• Manufacturer: Micron Semiconductor Products

READ TIMING PARAMETERS
NOTE: 1. Q(A2) refers to output from address A2. Q(A2 + 1) refers to output from the next internal burst address following A2.
2Mb: 128K x 18, 64K x 32/36 Flow-Through SyncBurst SRAM
MT58L128L18F_2.p65 – Rev. 6/01
BWE#, GW#,
BWa#-BWd#
SYMBOL
t
f
t
t
t
t
t
t
t
t
t
KC
KF
KH
KL
KQ
KQX
KQLZ
KQHZ
OEQ
OELZ
OEHZ
ADDRESS
(NOTE 2)
ADSC#
ADSP#
ADV#
OE#
CLK
CE#
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH. When
3. Timing is shown assuming that the device was not enabled before entering into this sequence.
4. Outputs are disabled
Q
CE# is HIGH, CE2# is HIGH and CE2 is LOW.
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
8.0
1.8
1.8
1.5
1.5
0
-6.8
125
6.8
3.8
3.8
3.8
High-Z
t ADSS
t AS
t CES
8.8
1.9
1.9
1.5
1.5
0
A1
-7.5
t ADSH
t KQLZ
t AH
t CEH
t KH
t OEQ
t KQ
113
7.5
4.2
4.2
4.2
t KC
Single READ
t WS
t KL
t
KQHZ after deselect.
10.0
1.9
1.9
3.0
1.5
Q(A1)
0
t WH
-8.5
t OEHZ
100
8.5
5.0
5.0
5.0
t ADSS
A2
4.0
4.0
3.0
1.5
15
t ADSH
0
t OELZ
-10
10.0
5.0
5.0
5.0
t AAS
66
Q(A2)
READ TIMING
t KQX
t AAH
MHz
t KQ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Q(A2 + 1)
(NOTE 1)
15
FLOW-THROUGH SYNCBURST SRAM
SYMBOL
t
t
t
t
t
t
t
t
t
t
AS
ADSS
AAS
WS
CES
AH
ADSH
AAH
WH
CEH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Q(A2 + 2)
ADV# suspends burst.
2Mb: 128K x 18, 64K x 32/36
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
1.8
BURST
1.8
1.8
1.8
1.8
0.5
0.5
0.5
0.5
0.5
READ
-6.8
Q(A2 + 3)
2.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
-7.5
2.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
Q(A2)
Burst wraps around
to its initial state.
DONÕT CARE
-8.5
Q(A2 + 1)
©2000, Micron Technology, Inc.
2.5
2.5
2.5
2.5
2.5
0.5
0.5
0.5
0.5
0.5
-10
Deselect Cycle
(Note 4)
UNDEFINED
Q(A2 + 2)
t KQHZ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns