k9f5608u0a-ycb0 Samsung Semiconductor, Inc., k9f5608u0a-ycb0 Datasheet - Page 26

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k9f5608u0a-ycb0

Manufacturer Part Number
k9f5608u0a-ycb0
Description
Nand Flash Memory
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
Figure 11. RESET Operation
R/B
I/O
Table3. Device Status
K9F5608U0A-YCB0,K9F5608U0A-YIB0
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. Refer to table 3 for device status after reset operation. If the device is
already in reset state a new reset command will not be accepted by the command register. The R/B pin transitions to low for tRST
after the Reset command is written. Refer to Figure 11 below.
0
~
7
Operation Mode
FFh
After Power-up
Read 1
t
RST
26
Waiting for next command
FLASH MEMORY
After Reset

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