m28f201-150xn6tr STMicroelectronics, m28f201-150xn6tr Datasheet - Page 16

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m28f201-150xn6tr

Manufacturer Part Number
m28f201-150xn6tr
Description
256k Chip Erase Flash Memory
Manufacturer
STMicroelectronics
Datasheet
M28F201
Figure 12. Erasing Flowchart
PRESTO F ERASE ALGORITHM
The PRESTO F Erase Algorithm guarantees that
the device will be erased in a reliable way. The
algorithm first programs all bytes to 00h in order to
ensure uniform erasure. The programming follows
the PRESTO F Programming Algorithm. Erase is
set-up by writing 20h to the command register, the
erasure is started by repeating this write cycle.
Erase Verify is set-up by writing A0h to the com-
mand register together with the address of the byte
to be verified. The subsequentread cycle reads the
data which is compared to FFh. Erase Verify begins
at address 0000h and continues to the last address
or until the comparison of the data to FFh fails. If
this occurs, the address of the last byte checked is
stored and a new Erase operation performed.
Erase Verify then continues from the address of the
stored location.
16/21
V PP < 6.5V
FAIL
YES
NO
1000
++n
=
READ DATA OUTPUT
NO
READ COMMAND
V PP < 6.5V, PASS
n=0, Addr=00000h
ERASE SET-UP
PROGRAM ALL
ERASE VERIFY
BYTES TO 00h
Latch Addr.
V PP = 12V
Wait 10ms
Wait 6 s
Data
Addr
Last
OK
YES
YES
NO
Addr++
AI00649
Figure 13. Programming Flowchart
PRESTO F PROGRAM ALGORITHM
The PRESTO F Programming Algorithm applies a
series of 10 s programming pulses to a byte until
a correct verify occurs. Up to 25 programming
operations are allowed for one byte. Program is
set-up by writing 40h to the command register, the
programming is started after the next write cycle
which also latches the address and data to be
programmed. Program Verify is set-up by writing
C0h to the command register, followed by a read
cycle and a compare of the data read to the data
expected. During Program and Program Verify op-
erations a MARGIN MODE circuit is activated to
guaranteethat the cell is programmed with a safety
margin.
V PP < 6.5V
FAIL
YES
NO
= 25
++n
READ DATA OUTPUT
PROGRAM SET-UP
PROGRAM VERIFY
V PP < 6.5V, PASS
NO
READ COMMAND
Latch Addr, Data
V PP = 12V
Wait 10 s
Wait 6 s
n = 0
Data
Addr
Last
OK
YES
YES
NO
Addr++
AI00677

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