ta1318af TOSHIBA Semiconductor CORPORATION, ta1318af Datasheet
ta1318af
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... TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic SYNC Processor, Frequency Counter IC for TV Component Signals TA1318AF is a sync processor for TV component signals. TA1318AF provides sync and frequency counter processing for external input signals. These functions are integrated pin SSOP-type plastic package. ...
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... Analog GND NC AFC Filter NC HVCO 2 SCL SDA NC HD2-OUT Digital GND CBUS INV Decoder SW HD2-OUT SW V-FREQ V C Pulse C/D H-Ramp H-FREQ DAC2 VD3-IN CC TA1318AF NC HD1-OUT 17 16 INV SW HD1-OUT HD3-IN CP-OUT 2003-02-19 ...
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... Input signal from this pin is not synchronized. Input vertical sync signal. It accepts input of both positive 2 VD2-IN and negative polarity. Input signal from this pin is not synchronized. Interface Circuit TA1318AF Input Signal/Output Signal Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V 2003-02-19 ...
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... It accepts input of both positive 4 VD1-IN and negative polarity. Input signal from this pin is not synchronized. GND pin for analog circuit 5 Analog GND blocks. 6 N.C. Connect to GND. Interface Circuit TA1318AF Input Signal/Output Signal Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V 2003-02-19 ...
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... Voltage on this pin determines horizontal output frequency. 8 N.C. Connect to GND. Connect ceramic oscillator for horizontal oscillation. 9 HVCO Use Murata CSBLA503KECZF30. 10 N.C. Connect to GND. VCC pin Connect 9 V (typ.). Interface Circuit 11 300 TA1318AF Input Signal/Output Signal DC 2003-02-19 ...
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... It accepts input of both positive and negative polarity. Input horizontal sync signal. 14 HD3-IN It accepts input of both positive and negative polarity. Interface Circuit 11 200 TA1318AF Input Signal/Output Signal DC or H/C SYNC Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V 2003-02-19 ...
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... Open collector output. HD1/HD2 input signals are 16 HD1-OUT output from this pin without synchronization. Polarity is switched by BUS write function. 17 N.C. Connect to GND. 18 Digital GND GND pin for logic blocks. Interface Circuit 11 200 200 TA1318AF Input Signal/Output Signal 5 2003-02-19 ...
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... Open collector output. HD1/HD2 input signals are 19 HD2-OUT output from this pin without synchronization. Polarity is switched by BUS write function. 20 N.C. Connect to GND SDA SDA pin for I C bus. Interface Circuit 11 200 SDA 21 ACK 8 TA1318AF Input Signal/Output Signal 2003-02-19 ...
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... SCL pin for I C bus. Slave address switch pin. When this pin is connected to 23 Address SW V (GND), used for DC/DD CC (D8/D9 ); when left open, H DA/ Interface Circuit 20 k SCL Input Signal/Output Signal DC/DD 7.5 V DA/DB 1.5 V D8/D9 5 TA1318AF 9 V 7 2003-02-19 ...
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... Hz, 1125P/30 Hz This IC doesn’t have the sync-separation circuit for non-standard signals like weak strength signal, ghost signal and so on. Interface Circuit 200 TA1318AF Input Signal/Output Signal White 100Ñ SYNC 2003-02-19 ...
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... Hz, 1125P/30 Hz This IC doesn’t have the sync-separation circuit for non-standard signals like weak strength signal, ghost signal and so on. Interface Circuit 200 TA1318AF Input Signal/Output Signal White 100Ñ Start phase or Start phase 2003-02-19 ...
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... Use the start phase of VD. DAC3 output pin. Open collector output. 30 DAC3 In Test mode, outputs test pulse for shipping. Interface Circuit 11 200 500 TA1318AF Input Signal/Output Signal Start phase or Start phase DC or test pulse for shipping 2003-02-19 ...
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... FREQUENCY DET H FREQUENCY DET *(10): 33.75 kHz (11): 45 kHz (10): HD3/VD3 (11): Synchronized HD/VD (10): HD3/VD3 (11): Synchronized HD/VD (10): 20IRE (11): 25IRE (at 1125I/60) *(10 (11 (10 (11 (1): ON (LOW) 13 TA1318AF D0 Preset D1 LSB MSB LSB SEPA LEVEL 1000 0000 HD1-INV HD2-INV 1000 0000 INPUT SW 1000 0000 VD1-INV VD2-INV ...
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... Format/H (V) Frequency 1125P/30 Hz (33.75 kHz) 750P/60 Hz (45 kHz) Free-running frequency is controlled by H-FREQUENCY. (00): 262 H (01): 525 H (10): 562 H (11): 750 H 1125I/60 Hz (33.75 kHz) 525P/60 Hz (31.5 kHz) PAL/SECAM/50 Hz (15.625 kHz) PAL/SECAM double scan/100 Hz (31.5 kHz) NTSC/60 Hz (15.734 kHz) NTSC double scan /120 Hz (31.5 kHz) VD output is HIGH 14 TA1318AF 2003-02-19 ...
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... Note 1, Note 2 and the other factors such as signal strength, existence of ghost signal, 2 H-AFC stability BUS data transmission and so on via prototype TV set evaluation. 476.2 s 474 [Hz [kHz] Data 1 and Start trigger 2 More than 3 V Counting period 2 (to Data 1) (to Data 2) 15 TA1318AF 1 s). Data 2 and Start trigger 3 2003-02-19 ...
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... Start and Stop Condition SDA SCL S Start condition Bit Transfer SDA SCL Acknowledge SDA by transmitter SDA by receiver SCL from master 0/1 P Stop condition SDA stable Change of SDA allowed Bit 9: High impedance Clock pulse for acknowledgment 16 TA1318AF A0 W/R 0/1 0/1 Only bit 9: Low impedance 2003-02-19 ...
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... MSB P: Stop condition A Transmit data A ////// Sub address A Transmit data n A Received data bit Sub address A Transmit data 1 //// 7 bit 8 bit MSB 17 TA1318AF A P Transmit data bit MSB 2 C Patent Rights to use 2 C Standard Specification 2003-02-19 ...
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... Note 3: Pins 24 and 26 are susceptible to damage from surge voltages and should be handled with extreme care. Symbol Rating Unit CCmax inmax p-p P (*1) 1136 9.1 mW 20~65 C opr T 55~150 C stg 1136 773 150 Ambient temperature Ta (°C) Figure Curve D 18 TA1318AF 2003-02-19 ...
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... Note: Pins 24 and 26 are susceptible to damage from surge voltages. Do not connect either of pins to an external input pin directly. When constructing a TV set, please consider to connect an external protection diode or a switch IC between any external input pin and pin 24 or 26. Description Min 8.5 2.0 2.0 0.02 0. 0.9 D8/ DC/DD 8 TA1318AF Typ. Max Unit 9.0 9.5 V 5.0 9.0 V p-p 5.0 9.0 0.20 H 0.25H 47H 400 s 1.0 1 ...
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... V thHD3 HP0 HP0 HP1 HP1 (Note HA07) HP2 HP2 HP3 HP3 (Note HA08 TA1318AF Unit mA Min Typ. Max Unit 0.6 0.7 0.8 s 0.6 0.7 0.8 0.6 0.7 0 0.040 0.070 0.100 0.060 0.106 0.152 0.081 0.142 ...
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... V15IL2 V15IH3 V15IL3 AFC phase detection current VCO oscillation start voltage V TH00 TH01 HD output pulse width (free-run) TH10 TH11 Test Test Condition Circuit (Note HA09) d-HD ID1 ID2 (Note HB01) ID3 ID4 (Note HB02) VCO (Note HB03) 21 TA1318AF Min Typ. Max Unit 1.0 1.2 1.4 s 4.5 5.0 5.5 0.1 0.5 4.5 5.0 5.5 0.1 0.5 V 4.5 5.0 5.5 0.1 0.5 4.5 5 ...
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... DAC1 output voltage VDAC VDAC VDAC VDAC DAC2 output voltage VDAC VDAC VDAC DAC3 output voltage VDAC Test Test Condition Circuit F00 F01 (Note HB04) F10 F11 F50 (Note HB05 TA1318AF Min Typ. Max Unit 15.59 15.75 15.91 31.19 31.5 31.82 kHz 33.41 33.75 34.09 44.55 45 45.45 15.47 15.625 15.78 2.4 3.0 3.6 4.8 6.0 7.2 kHz/V 4.8 6.0 7.2 7.1 8 ...
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... V22TL1 V22TH2 V22TL2 V22TH3 V22TL3 V23TH0 V23TL0 V23TH1 V23TL1 V23TH2 V23TL2 V23TH3 V23TL3 V22IH0 V22IL0 V22IH1 V22IL1 V22IH2 V22IL2 V22IH3 V22IL3 V23IH0 V23IL0 V23IH1 V23IL1 V23IH2 V23IL2 V23IH3 V23IL3 (Note VA03 TA1318AF Min Typ. Max Unit 0.65 0.75 0.85 V 0.65 0.75 0.85 p-p 0.65 0.75 0.85 0.65 0.75 0.85 V p-p 4.5 5.0 5.5 0.1 0.5 4.5 5.0 5.5 0.1 0.5 V 4.5 5.0 5.5 0.1 0.5 4.5 5.0 5 ...
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... FV21 FV22 FV23 FVPL0 FVPL1 Vertical pull-in range FVPL2 FVPL3 15.75 kHz 31.50 kHz Sync input-VD output phase difference 33.75 kHz 45.00 kHz Test Test Condition Circuit FV0 FV1 FV3 FV4 FV5 (Note VA04) FV6 (Note VA05) 24 TA1318AF Min Typ. Max Unit 26.02 26.35 26.67 39.21 39.75 40.30 52.20 52.98 53.77 54.24 55.06 55.89 91.28 92.98 94.69 Hz 107.8 109.9 112.1 57.0 60.0 63 ...
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... Measure the phase difference 3qC, unless otherwise specified between pin 21 and pin 6 (AFC filter) wave form. 1PH between pin 19 and pin 6 (AFC filter) wave form. 2PH 29.63 Ps 0.593 Ps Signal a 0.285 1PH 2PH Pin 6 wave form TA1318AF 2003-02-19 ...
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... Increasing the duty of Signal b to 100% (get negative period longer), measure the duty of Signal b (HD-DUTY2) when the phase between pin 11 and pin 13 (HD1OUT) change. Signal 3qC, unless otherwise specified between pin 11 and pin 6 (AFC filter) wave form. 3PH 31.75 Ps 2. 3PH 31.75 Ps 2. A/( 100 (%) * duty TA1318AF 2003-02-19 ...
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... sync11 ) when HD-OUT desynchronizes with signal a calculate V sync12 , V and V as well. thS11 thS12 thS13 and V against pin 19 (SYNC2-IN) in the same way thS22 thS23 29.63 Ps 0.593 Ps 0.285 V thHD3 31. thHD1 TA1318AF . thS10 when HD1-OUT lock. 2003-02-19 ...
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... Increasing the voltage of Signal b from 0 V, measure the voltage of Signal b V (4) Measure the voltage of pin 1 V Signal 3qC, unless otherwise specified when HD1-OUT lock. thHD1 . Measure the voltage of pin well. thHD2 thHD3 31. thHD1 TA1318AF 2003-02-19 ...
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... When horizontal period of Signal 22.22 Ps measure'HP3 and 'HP3 as well. Signal b Pin 15 wave form data (00) Pin wave form data (7C) (80) Pin wave form data (FC 3qC, unless otherwise specified 63.5 Ps) to pin 11 (HD3-IN 2.35 Ps 1.5 V 'HP* 'HP* TA1318AF 2003-02-19 ...
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... width (CP ), output level ( pin 12 (CLP-OUT) against width (CP ), output level ( pin 12 (SCP-OUT) against width (CP ), output level ( pin 12 (SCP-OUT) against pin 29.63 Ps 2. TA1318AF 2003-02-19 ...
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... Test Conditions and Measuring Method (V S18 S19 S21 b (1) Set sub-address (00) 70. (2) Input Signal b (horizontal 31.5 kHz) to pin 11 (HD3-IN). (3) Set sub-address (02) 62. (4) Measure the pulse width (WdHD) of pin 6 (AFC filter) wave form. Signal b Pin 6 wave form 31 TA1318AF 25 r 3qC, unless otherwise specified 31.75 Ps 2.35 Ps 1.5 V Wd-HD 2003-02-19 ...
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... ID3 [PA] (V3 [V]y1 [k:]) u1000 ID4 [PA] (V4 [V] y1 [k:]) u 1000 Pin 21 wave form Pin 6 wave form (1) Increasing the voltage of pin 8 V wave form 3qC, unless otherwise specified 63.5 Ps 0.25 V V1, V3 V2, V4 form 2.5V, measure the voltage V when pin 7 appear oscillation CC VCO TA1318AF 2003-02-19 ...
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... pin 6, then measure the frequency FA pin 13 (HD1-OUT) wave form. Calculate frequency changing ratio (BH00). BH00 (4) When horizontal oscillation frequency is 31.5 kHz (01), 33.75 kHz (10), 45 kHz (11), calculate BH01, BH10, BH11 as wall. 33 TA1318AF 25 r 3qC, unless otherwise specified (FB FA)/0.1 ...
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... Increasing the voltage of Signal b from 0 V, measure the voltage of Signal a V Signal 3qC, unless otherwise specified thVD1 against pin 2 and pin 10 as wall. 16.67 ms 0.12 ms Signal a V thVD1 thVD3 16.67 ms 0.12 ms TA1318AF when VD1-OUT lock. when VD1-OUT lock. 2003-02-19 ...
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... When sub-addrss (00) is B0, measure the pulse width VPW2 of pin 22 (VD1-OUT) wave form. (4) When sub-addrss (00) is 30, 70, F0, measure the pulse width VPW0, VPW1, VPW3 of pin 22 (VD1-OUT) wave form as well. Signal a Pin 22 wave form 35 TA1318AF 25 r 3qC, unless otherwise specified 29.63 Ps 0.593 Ps ...
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... Input no-signal to pin 3 (HD1-IN). (5) Set sub-address (02) 42. (6) When sub-address (00) is 30, 70 F0, measure the frequency FV20, FV21, FV22 or FV23 of pin 22 (VD1-OUT) wave form. Signal a Pin 22 wave form 36 TA1318AF 25 r 3qC, unless otherwise specified 29.63 Ps 0.593 Ps 0.285 V V period ...
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... Measure FVPL3 as well. Signal a Signal c Pin 22 wave form 3qC, unless otherwise specified 63.5 Ps) to pin 11 (HD3-IN). 1ms) to pin 10 (VD3-IN). Increasing vertical period of Signal C, 22.22 Ps) to pin 11 (HD3-IN). horizontal period TPs 0.593 Ps 1 period (initial T 1 ms) 0.25 ms 1.5 V measuring period TA1318AF 2003-02-19 ...
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... TA1318AF SW6 Pin 6 Pin 3 Pin 4 38 SCL SDA #17 #16 # #10 #11 Pin 7 Pin 9 Pin 10 Pin 11 Pin 12 TA1318AF TP 1- 2-in # #12 @ Mylar capacitor M 2003-02-19 ...
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... HD2-IN VD2-IN HD1-IN VD1-IN VD2- VD1- SYNC1- SYNC2- DAC1 OUT OUT TA1318AF 360 : CSBLA503KECZF30 39 HD2- SCL SDA OUT 0.01 PF 100 PF DAC2 VD3-IN HD3-IN CP-OUT @ M TA1318AF HD1- OUT 16 15 Mylar capacitor 2003-02-19 ...
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... H-AFC stability, I transmission and so on via prototype TV set evaluation. Signal 1 AFC SYNC1-IN for H-AFC Internal pulse (A) Signal 2 SYNC2-IN for H/V freq. counter TA1318AF 40 TA1318AF BUS READ H/V FREQ COUNTER 2 C BUS data 2003-02-19 ...
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... Package Dimensions Weight: 0.63 g (typ.) 41 TA1318AF 2003-02-19 ...
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... TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. x The information contained herein is subject to change without notice. 42 TA1318AF 000707EBA 2003-02-19 ...