ta1310ang TOSHIBA Semiconductor CORPORATION, ta1310ang Datasheet - Page 17
ta1310ang
Manufacturer Part Number
ta1310ang
Description
Ntsc Video, Chroma, Deflection, And Distortion Compensation Ic With Yuv Interface And Acb
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TA1310ANG.pdf
(106 pages)
- Current page: 17 of 106
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I
2
C BUS Conditions
In the above method, the subaddresses are automatically incremented from the specified subaddress and data
are set.
Low level input voltage
High level input voltage
Low level output voltage at 3 mA sink current
Input current each I/O pin with an input voltage
between 0.1 VDD and 0.9 VDD
Capacitance for each I/O pin
SCL clock frequency
Hold time START condition
Low period of SCL clock
High period of SCL clock
Set-up time for a repeated START condition
Data hold time
Data set-up time
Set-up time for STOP condition
Bus free time between a STOP and START condition
Characteristics
t
t
Symbol
t
t
t
HD;STA
SU;STA
HD;DAT
SU;DAT
SU;STO
t
V
t
f
t
HIGH
LOW
V
BUF
V
SCL
OL1
C
17
I
IH
IL
i
i
Min
−10
350
250
3.0
4.0
4.7
4.0
4.7
4.0
4.7
⎯
0
0
0
Typ.
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Max
Vcc
100
1.5
0.4
10
10
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Unit
kHz
µA
pF
µs
µs
µs
µs
ns
ns
µs
µs
V
V
V
TA1310ANG
2005-09-20
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