ta1370fg TOSHIBA Semiconductor CORPORATION, ta1370fg Datasheet
ta1370fg
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... TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic SYNC Processor, Frequency Counter IC for TV Component Signals TA1370FG is a sync processor for TV component signals. TA1370FG provides sync and frequency counter processing for external input signals. These functions are integrated pin SSOP-type plastic package. ...
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... Analog GND NC AFC Filter NC HVCO 2 SCL SDA NC HD2-OUT Digital GND CBUS INV Decoder SW HD2-OUT SW V-FREQ V C Pulse × C/D H-Ramp H-FREQ DAC2 VD3-IN CC TA1370FG NC HD1-OUT 17 16 INV SW HD1-OUT HD3-IN CP-OUT 2005-09-05 ...
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... Input signal from this pin is not synchronized. Input vertical sync signal. It accepts input of both positive 2 VD2-IN and negative polarity. Input signal from this pin is not synchronized. Interface Circuit 11 1 kΩ kΩ TA1370FG Input Signal/Output Signal Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V 2005-09-05 ...
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... Input signal from this pin is not synchronized. GND pin for analog circuit 5 Analog GND blocks. 6 N.C. Connect to GND. Interface Circuit 11 1 kΩ kΩ ⎯ ⎯ 4 TA1370FG Input Signal/Output Signal Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V ⎯ ⎯ 2005-09-05 ...
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... Connect ceramic oscillator for horizontal oscillation. 9 HVCO Use Murata CSBLA503KECZF30. 10 N.C. Connect to GND. VCC pin Connect 9 V (typ.). Interface Circuit 11 300 Ω 30 kΩ ⎯ kΩ kΩ 10 kΩ 5 ⎯ ⎯ 5 TA1370FG Input Signal/Output Signal DC ⎯ ⎯ ⎯ ⎯ 2005-09-05 ...
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... It accepts input of both positive and negative polarity. Input horizontal sync signal. 14 HD3-IN It accepts input of both positive and negative polarity. Interface Circuit 11 200 Ω kΩ kΩ TA1370FG Input Signal/Output Signal DC or H/C SYNC Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V 2005-09-05 ...
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... HD1/HD2 input signals are 16 HD1-OUT output from this pin without synchronization. Polarity is switched by BUS write function. 17 N.C. Connect to GND. 18 Digital GND GND pin for logic blocks. Interface Circuit 11 200 Ω 200 Ω ⎯ ⎯ 7 TA1370FG Input Signal/Output Signal 5 ⎯ ⎯ 2005-09-05 ...
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... HD1/HD2 input signals are 19 HD2-OUT output from this pin without synchronization. Polarity is switched by BUS write function. 20 N.C. Connect to GND SDA SDA pin for I C bus. Interface Circuit 11 200 Ω ⎯ 50 Ω 20 kΩ SDA 21 ACK 8 TA1370FG Input Signal/Output Signal or ⎯ 11 ⎯ 2005-09-05 ...
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... SCL pin for I C bus. Slave address switch pin. When this pin is connected to 23 Address SW V (GND), used for DC/DD CC (D8/D9 ); when left open, H DA/ Interface Circuit 20 kΩ SCL 22 1 kΩ Input Signal/Output Signal DC/DD 7.5 V DA/DB 1.5 V D8/D9 5 TA1370FG ⎯ 7 2005-09-05 ...
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... This IC doesn’t have the sync-separation circuit for non-standard signals like weak strength signal, ghost signal and so on. Interface Circuit kΩ 200 Ω TA1370FG Input Signal/Output Signal White 100％ p− SYNC 2005-09-05 ...
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... This IC doesn’t have the sync-separation circuit for non-standard signals like weak strength signal, ghost signal and so on. Interface Circuit kΩ 5 ⎯ 11 200 Ω TA1370FG Input Signal/Output Signal White 100％ p−p or ⎯ Start phase or Start phase 2005-09-05 ...
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... Use the start phase of VD. DAC3 output pin. Open collector output. 30 DAC3 In Test mode, outputs test pulse for shipping. Interface Circuit 11 200 Ω 500 Ω TA1370FG Input Signal/Output Signal Start phase or Start phase DC or test pulse for shipping 2005-09-05 ...
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... FREQUENCY DET H FREQUENCY DET *(10): 33.75 kHz (10): HD3/VD3 (11): Synchronized HD/VD (10): HD3/VD3 (11): Synchronized HD/VD (10): 20IRE (11): 25IRE (at 1125I/60) *(10 (11 (10 (11 (1): ON (LOW) 13 TA1370FG D0 Preset D1 LSB MSB LSB SEPA LEVEL 1000 0000 HD1-INV HD2-INV 1000 0000 INPUT SW 1000 0000 VD1-INV VD2-INV 1000 ...
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... Normal (1): Inverse Format/H (V) Frequency 750P/60 Hz (45 kHz) 625P/50 Hz (31.25 kHz) Free-running frequency is controlled by H-FREQUENCY. (00): 562 H (01): 525 H (10): 562 H (11): 750 H 1125I/60 Hz (33.75 kHz), 1125I/50Hz (28.125 kHz) 525P/60 Hz (31.5 kHz) PAL/SECAM double scan/100 Hz (31.5 kHz) NTSC double scan /120 Hz (31.5 kHz) VD output is HIGH 14 TA1370FG 2005-09-05 ...
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... Note 1, Note 2 and the other factors such as signal strength, existence of ghost signal, H-AFC stability BUS data transmission and so on via prototype TV set evaluation. Data 1 and Start trigger 2 More than 3 V Counting period 2 (to Data 1) (to Data 2) 15 TA1370FG Data 2 and Start trigger 3 2005-09-05 ...
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... Start and Stop Condition SDA SCL S Start condition Bit Transfer SDA SCL Acknowledge SDA by transmitter SDA by receiver SCL from master 0/1 P Stop condition SDA stable Change of SDA allowed Bit 9: High impedance Clock pulse for acknowledgment 16 TA1370FG A0 W/R 0/1 0/1 Only bit 9: Low impedance 2005-09-05 ...
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... HIGH ⎯ t 4.7 SU;STA ⎯ t 350 HD;DAT ⎯ t 250 SU;DAT ⎯ t 4.0 SU;STO ⎯ t 4.7 BUF 17 TA1370FG ･･････ Transmit data bit MSB Max Unit 1.5 V Vcc V 0.4 V µ 100 kHz ⎯ µs ⎯ µs ⎯ ...
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... Symbol Rating V 12 CCmax GND − (Note1) 1136 D 1/ θ ja 9.1 − opr − 150 T stg 1136 682 150 Ambient temperature Ta (°C) Figure Curve D 18 TA1370FG Unit mW/ ° C ° C ° C 2005-09-05 ...
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... HD1, HD2, VD1, VD2-OUT Pin 16, 19, 28, 29 Input current DAC3 Input current Pin 30 Address switching voltage Pin 23 Description Min 8.5 2.0 2.0 0.02 0.45 µ µ 0.9 ⎯ ⎯ D8/ DC/DD 8 TA1370FG Typ. Max Unit 9.0 9.5 V 5.0 9.0 Vp-p 5.0 9.0 ⎯ 0.20 H ⎯ ⎯ 0.25H ⎯ ⎯ 47H ⎯ µ s 400 1.0 1.1 Vp-p 0 ...
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... HP3 + ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ CP (Note HA08) W1 ⎯ ⎯ ⎯ ⎯ TA1370FG Unit mA Min Typ. Max Unit 0.6 0.7 0.8 µ s 0.6 0.7 0.8 µ s 0.6 0.7 0 0.040 0.070 0.100 0.060 0.106 0.152 0.081 ...
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... ID1 ⎯ ID2 (Note HB01) ⎯ ID3 ⎯ ID4 ⎯ (Note HB02) VCO ⎯ ⎯ (Note HB03) ⎯ ⎯ 21 TA1370FG Min Typ. Max Unit µ s 1.0 1.2 1.4 4.5 5.0 5.5 ⎯ 0.1 0.5 4.5 5.0 5.5 ⎯ 0.1 0.5 V 4.5 5.0 5.5 ⎯ 0.1 0.5 4.5 5.0 5.5 ⎯ ...
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... Circuit ⎯ F00 ⎯ F01 ⎯ (Note HB04) F10 ⎯ F11 ⎯ F50 ⎯ ⎯ (Note HB05) ⎯ ⎯ ⎯ 10 ⎯ 11 ⎯ ⎯ 12 ⎯ 13 ⎯ 20 ⎯ 21 ⎯ ⎯ 22 ⎯ 23 ⎯ 30 ⎯ ⎯ TA1370FG Min Typ. Max Unit 27.84 28.125 28.41 31.19 31.5 31.82 kHz 33.41 33.75 34.09 44.55 45 45.45 30.94 31.25 31.56 4.3 5.4 6.5 4.8 6.0 7.2 kHz/V 4.8 6.0 7.2 7.1 8.9 10.7 0.5 1.0 1.5 2.7 3.0 3 ...
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... V28IL2 ⎯ V28IH3 ⎯ V28IL3 ⎯ V29IH0 ⎯ V29IL0 ⎯ V29IH1 ⎯ V29IL1 ⎯ ⎯ V29IH2 ⎯ V29IL2 ⎯ V29IH3 ⎯ V29IL3 ⎯ ⎯ (Note VA03) ⎯ ⎯ TA1370FG Min Typ. Max Unit 0.65 0.75 0.85 Vp-p 0.65 0.75 0.85 0.65 0.75 0.85 0.65 0.75 0.85 Vp-p 4.5 5.0 5.5 ⎯ 0.1 0.5 4.5 5.0 5.5 ⎯ 0.1 0.5 V 4.5 5.0 5.5 ⎯ 0.1 ...
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... Test Test Condition Circuit ⎯ FV0 ⎯ FV1 ⎯ FV3 ⎯ FV4 ⎯ FV5 (Note VA04) ⎯ FV6 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ (Note VA05) ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 24 TA1370FG Min Typ. Max Unit 39.21 39.75 40.30 45.89 46.55 47.25 52.20 52.98 53.77 54.25 55.06 55.89 91.28 92.98 94.69 Hz 107.8 109.9 112.1 47.0 50.0 53.0 57.0 60.0 63.0 57.0 60 ...
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... Measure the phase difference ± 3°C, unless otherwise specified) CC between pin 26 and pin 7 (AFC filter) wave form. 1PH between pin 24 and pin 7 (AFC filter) wave form. 2PH 29.63 µs 0.593 µs Signal a 0.285 V ･S S 1PH 2PH Pin 7 wave form TA1370FG 2005-09-05 ...
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... Increasing the duty of Signal b to 100% (get negative period longer), measure the duty of Signal b (HD-DUTY2) when the phase between pin 14 and pin 16 (HD1OUT) change. Signal ± 3°C, unless otherwise specified) CC between pin 14 and pin 7 (AFC filter) wave form. 3PH 31.75 µs 2.35 µs 1 3PH 31.75 µs 2.35 µs 1 duty = A/( × 100 (%) TA1370FG 2005-09-05 ...
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... ± 3°C, unless otherwise specified sync11 ) when HD-OUT desynchronizes with signal a calculate V sync12 , V and V as well. thS11 thS12 thS13 and V against pin 24 (SYNC2-IN) in the same way thS22 thS23 29.63 µs 0.593 µs 0.285 V thHD3 31.75 µs 2.35 µs V thHD1 TA1370FG . thS10 when HD1-OUT lock. 2005-09-05 ...
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... Increasing the voltage of Signal b from 0 V, measure the voltage of Signal b V (4) Measure the voltage of pin 1 V Signal ± 3°C, unless otherwise specified) CC when HD1-OUT lock. thHD1 . Measure the voltage of pin well. thHD2 thHD3 31.5 µs 2.35 µs V thHD1 TA1370FG 2005-09-05 ...
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... When horizontal period of Signal 22.22 µs measure ∆HP3− and ∆HP3+ as well. Signal b Pin 16 wave form data (00) Pin 16 wave form data (7C) (80) Pin 16 wave form data (FC) 29 TA1370FG = ± 3°C, unless otherwise specified µs 2.35 µs 1.5 V ∆HP*− ∆HP*+ 2005-09-05 ...
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... Measure the clamp pulse phase (CP Signal a. (7) Input no-signal to pin 14. (8) Measure the clamp pulse phase (CP 16 (HD-OUT). Signal a Pin 15 wave form Pin 16 wave form Pin 15 wave form 30 TA1370FG = ± 3°C, unless otherwise specified width (CP ), output level ( pin 15 (CLP-OUT) against width (CP ...
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... S26 ⎯ ⎯ b (1) Set sub-address (00) 70. (2) Input Signal b (horizontal 31.5 kHz) to pin 14 (HD3-IN). (3) Set sub-address (02) 02. (4) Measure the pulse width (WdHD) of pin 7 (AFC filter) wave form. Signal b Pin 7 wave form 31 TA1370FG = ± 3°C, unless otherwise specified) CC 31.75 µs 2.35 µs 1.5 V Wd-HD 2005-09-05 ...
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... ID4 [µA] = (V4 [V] ÷ 1 [kΩ]) × 1000 Pin 26 wave form Pin 7 wave form ⎯ ⎯ ⎯ (1) Increasing the voltage of pin 11 V wave form ± 3°C, unless otherwise specified) CC 35.56 µs 0.25 V V1, V3 V2, V4 form 2.5V, measure the voltage V when pin 9 appear oscillation CC VCO TA1370FG 2005-09-05 ...
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... − 0. pin 7, then measure the frequency FA pin 16 (HD1-OUT) wave form. Calculate frequency changing ratio (BH00). BH00 = (FB − FA)/0.1 (4) When horizontal oscillation frequency is 31.5 kHz (01), 33.75 kHz (10), 45 kHz (11), calculate BH01, BH10, BH11 as wall. 33 TA1370FG = ± 3°C, unless otherwise specified 2005-09-05 ...
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... Increasing the voltage of Signal b from 0 V, measure the voltage of Signal a V Signal ± 3°C, unless otherwise specified) CC thVD1 against pin 2 and pin 13 as wall. 16.67 ms 0.12 ms Signal a V thVD1 thVD3 16.67 ms 0.12 ms TA1370FG when VD1-OUT lock. when VD1-OUT lock. 2005-09-05 ...
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... When sub-addrss (00) is 30, measure the pulse width VPW2 of pin 28 (VD1-OUT) wave form. (4) When sub-addrss (00) is 70, B0, F0, measure the pulse width VPW0, VPW1, VPW3 of pin 28 (VD1-OUT) wave form as well. Signal a Pin 28 wave form 35 TA1370FG = ± 3°C, unless otherwise specified) CC 29.63 µs 0.593 µs 0.285 V ...
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... Input no-signal to pin 14 (HD3-IN). (5) Set sub-address (02) 42. (6) When sub-address (00) is 30, 70 F0, measure the frequency FV20, FV21, FV22 or FV23 of pin 28 (VD1-OUT) wave form. Signal a Pin 28 wave form 36 TA1370FG = ± 3°C, unless otherwise specified) CC 29.63 µs 0.593 µs 0.285 V V period ...
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... Set sub-address (00) B0. (10) Measure FVPL2 as well. (11) Input Signal a (horizontal period T = 22.22 µs) to pin 14 (HD3-IN). (12) Set sub-address (00) F0. (13) Measure FVPL3 as well. Signal a Signal c Pin 28 wave form 37 TA1370FG = ± 3°C, unless otherwise specified) CC horizontal period Tµs 0.593 µs 1 period (initial ms) 0.25 ms 1.5 V ...
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... TA1370FG SW7 1 kΩ Pin 7 Pin 3 Pin 4 38 SCL SDA #22 #21 # #12 #13 #14 Pin 9 Pin 12 Pin 13 Pin 14 Pin 15 TA1370FG TP 1- µF TP 2-in # µF #15 ○ Mylar capacitor M 2005-09-05 ...
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... SYNC1- SYNC2- DAC1 OUT OUT TA1370FG 360 Ω CSBLA503KECZF30 39 HD2- SCL SDA OUT 0.01 µF 100 µF DAC2 VD3-IN HD3-IN CP-OUT ○ M TA1370FG HD1- OUT 16 15 Mylar capacitor 2005-09-05 ...
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... H-AFC stability, I transmission and so on via prototype TV set evaluation. Signal 1 AFC SYNC1-IN for H-AFC Internal pulse (A) Signal 2 SYNC2-IN for H/V freq. counter TA1370FG 40 TA1370FG BUS READ H/V FREQ COUNTER 2 C BUS data 2005-09-05 ...
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... Package Dimensions Weight: 0.63 g (typ.) 41 TA1370FG 2005-09-05 ...
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... TA1370FG 2005-09-05 ...