cx28250 Mindspeed Technologies, cx28250 Datasheet - Page 41
cx28250
Manufacturer Part Number
cx28250
Description
Cx28250 Atm Physical Interface Phy Devices
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28250.pdf
(213 pages)
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CX28250
ATM Physical Interface (PHY) Devices
28250-DSH-002-C
2.1.1.1 PECL Layout
All PECL traces must be treated as transmission lines. Therefore, standard
high-speed practices must be followed:
where:
in a width (w) of 0.11 inches.
• Keep traces as short as reasonable.
• Do not allow traces to cross discontinuities in the ground/power planes.
• Use separate Power and Ground planes.
• Terminate all inputs and outputs as described above.
• Place the terminating resistors as close to the destination IC as possible.
• Do not route signal traces through the board through vias.
• Check that each IC has two high-quality RF bypass capacitors that are at
• Avoid 90 degree turns in trace routing.
• Ensure that the trace width results in a line impedance that matches the
w = trace width
Z
h = board thickness (not including copper layers)
t = thickness of copper layers
e
Using the generic values Z
r
0
= relative dielectric constant of the board
= characteristic line impedance
least an order of magnitude apart; e.g., 200 pF and 0.1 µF.
input impedance of the load. Trace width can be calculated from the
following equation:
Mindspeed Technologies
w
=
⎛
⎜
⎝
7.745
0
= 50 Ω, h = 0.060, t = 0.0015 and e
×
h
×
e
–
™
--------------------------------------
e
r
+
1.41
87
×
Z 0
⎞
⎟
⎠
–
2.0 Functional Description
------ -
0.8
t
2.1 Line Interface
r
= 4.8 results
2-5
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