FM24C04A_05 RAMTRON [Ramtron International Corporation], FM24C04A_05 Datasheet
FM24C04A_05
Related parts for FM24C04A_05
FM24C04A_05 Summary of contents
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FM24C04A 4Kb FRAM Serial Memory Features 4K bit Ferroelectric Nonvolatile RAM Organized as 512 x 8 bits 12 High Endurance 10 Read/Writes 45 Year Data Retention NoDelay™ Writes Advanced High-Reliability Ferroelectric Process Fast Two-wire Serial Interface MHz ...
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Counter ` Serial to Parallel SDA Converter SCL WP Control Logic A1 A2 Pin Description Pin Name I/O Pin Description A1-A2 Input Address 1-2: The address pins set the device select address. The device address value in the 2-wire slave ...
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Overview The FM24C04A is a serial FRAM memory. The memory array is logically organized as 512 x 8 and is accessed using an industry standard two-wire interface. Functional operation of the FRAM is similar to serial EEPROMs. The major difference ...
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Stop Condition A Stop condition is indicated when the bus master drives SDA from low to high while the SCL signal is high. All operations must end with a Stop condition operation is pending when a stop is ...
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Figure 4. Slave Address No word address occurs for a read operation. Reads always use the lower 8-bits that are held internally in th the address latch and the 9 address bit is part of the slave address. Reads always ...
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Start By Master S Slave Address By FM24C04A Start By Master S Slave Address By FM24C04A Read Operation There are two basic types of read operations. They are current address read and selective address read. For current address reads, the ...
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Start By Master S By FM24C04A Start Address By Master S Slave Address By FM24C04A Address Start By Master S Slave Address FM24C04A Endurance Internally, a FRAM operates with a read and restore mechanism. Therefore, endurance cycles ...
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Electrical Specifications Absolute Maximum Ratings Symbol V Power Supply Voltage with respect Voltage on any signal pin with respect Storage Temperature STG T Lead Temperature (Soldering, 10 seconds) LEAD V Electrostatic Discharge ...
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AC Parameters ( Symbol Parameter f SCL Clock Frequency SCL t Clock Low Period LOW t Clock High Period HIGH t SCL Low to SDA Data Out Valid AA t ...
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Diagram Notes All start and stop timing parameters apply to both read and write cycles. Clock specifications are identical for read and write cycles. Write timing parameters apply to slave address, word address, and write data bits. Functional relationships are ...
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Mechanical Drawing 8-pin SOIC (JEDEC Standard MS-012 variation AA) Pin 1 4.90 0.10 ± 1.27 0.33 0.51 Refer to JEDEC MS-012 for complete dimensions and notes. All dimensions in millimeters. SOIC Package Marking Scheme Legend: XXXX= part number, P= package ...
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Revision History Revision Date 1.0 7/26/02 2.0 7/31/03 2.1 3/17/04 3.0 3/9/05 Rev. 3.0 Mar. 2005 Summary Preliminary Changed to Production status. Added “green” packaging option. Changed input leakage spec to 1uA. Changed Data Retention spec. Added ESD and package ...