FM22LD16_09 RAMTRON [Ramtron International Corporation], FM22LD16_09 Datasheet
FM22LD16_09
Related parts for FM22LD16_09
FM22LD16_09 Summary of contents
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Pre-Production FM22LD16 4Mbit F-RAM Memory Features 4Mbit Ferroelectric Nonvolatile RAM Organized as 256Kx16 Configurable as 512Kx8 Using /UB, / Read/Write Cycles NoDelay™ Writes Page Mode Operation to 40MHz Advanced High-Reliability Ferroelectric Process SRAM Compatible JEDEC 256Kx16 SRAM Pinout ...
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Pin Description Pin Name Type Pin Description A(17:0) Input Address inputs: The 18 address lines select one of 262,144 words in the F-RAM array. The lowest two address lines A(1:0) may be used for page mode read and write operations. ...
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Functional Truth Table /CE /WE A(17: Change L H Change Change X X Notes: 1) H=Logic High, L=Logic Low, V=Valid Data, X=Don’t Care. 2) /WE-controlled ...
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Overview The FM22LD16 is a wordwide F-RAM memory logically organized as 262,144 x 16 and accessed using an industry standard parallel interface. All data written to the part is immediately nonvolatile with no delay. The device offers page mode operation ...
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Precharge Operation The precharge operation is an internal condition in which the state of the memory is being prepared for a new access. Precharge is user-initiated by driving ...
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For example, the following sequence write-protects addresses from 18000h to 27FFFh (sectors 3 & 4): Address Data Read 24555h Read 3AAAAh Read 02333h Read 1CCCCh Read 000FFh Read 3EF00h Write 3AAAAh 18h Write 1CCCCh E7h Write 0FF00h Read 00000h Rev. ...
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Software Write Protect Timing SRAM Drop-In Replacement The FM22LD16 has been designed drop-in replacement for standard asynchronous SRAMs. The device does not require /CE to toggle for each new address. /CE may remain low indefinitely. While /CE ...
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Electrical Specifications Absolute Maximum Ratings Symbol Description V Power Supply Voltage with respect Voltage on any signal pin with respect Storage Temperature STG T Lead Temperature (Soldering, 10 seconds) LEAD V Electrostatic ...
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Read Cycle AC Parameters ( Symbol Parameter t Read Cycle Time RC t Chip Enable Access Time CE t Address Access Time AA t Output Hold Time OH t Page Mode ...
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Power Cycle Timing ( Symbol Parameter t Power-Up (after Last Write (/WE high) to Power Down Time Rise Time Fall ...
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Page Mode Read Cycle Timing Although sequential column addressing is shown not required. Write Cycle Timing 1 (/WE-Controlled) Write Cycle Timing 2 (/CE-Controlled) CE A(17:0) WE DQ(15:0) UB/LB Rev. 2.0 Dec. 2009 Note: /OE (not shown) is low ...
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Write Cycle Timing 3 (/CE low) Note: /OE (not shown) is low only to show effect of / pins Page Mode Write Cycle Timing Although sequential column addressing is shown not required. Power Cycle Timing Rev. ...
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Mechanical Drawing 48-ball FBGA (0.75mm ball pitch) 48 FBGA Package Marking Scheme Legend: RAMTRON XXXXXX= part number, S=speed, P=package XXXXXXX-S-P LLLLLL= lot code, YY=year, WW=work week LLLLLLL YYWW Examples: FM22LD16, “Green”/RoHS FBGA package, Lot C8556953BG1, Year 2008, Work Week 44 ...
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Revision History Revision Date 1.0 10/2/2008 1.1 2/18/2009 2.0 12/22/2009 Rev. 2.0 Dec. 2009 Summary Initial release. Added UB/LB signals to timing diagrams and added timing parameters to AC table. Added tape & reel ordering information. Changed status to Pre-Production. ...