FM22LD16_09 RAMTRON [Ramtron International Corporation], FM22LD16_09 Datasheet

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FM22LD16_09

Manufacturer Part Number
FM22LD16_09
Description
4Mbit F-RAM Memory
Manufacturer
RAMTRON [Ramtron International Corporation]
Datasheet
Pre-Production
FM22LD16
4Mbit F-RAM Memory
Features
4Mbit Ferroelectric Nonvolatile RAM
SRAM Compatible
Advanced Features
Description
The FM22LD16 is a 256Kx16 nonvolatile memory
that reads and writes like a standard SRAM. A
ferroelectric random access memory or F-RAM is
nonvolatile, which means that data is retained after
power is removed. It provides data retention for over
10 years while eliminating the reliability concerns,
functional
complexities of battery-backed SRAM (BBSRAM).
Fast write timing and high write endurance make the
F-RAM superior to other types of memory.
In-system operation of the FM22LD16 is very similar
to other RAM devices and can be used as a drop-in
replacement for standard SRAM. Read and write
cycles may be triggered by /CE or simply by
changing the address. The F-RAM memory is
nonvolatile due to its unique ferroelectric memory
process. These features make the FM22LD16 ideal
for
frequent or rapid writes in the form of an SRAM.
The FM22LD16 includes a low voltage monitor that
blocks access to the memory array when V
below V
inadvertent access and data corruption under this
condition. The device also features software-
controlled write protection. The memory array is
divided into 8 uniform blocks, each of which can be
individually write protected.
This is a product in the pre-production phase of development. Device
characterization is complete and Ramtron does not expect to change the
specifications. Ramtron will issue a Product Change Notice if any
specification changes are made.
Rev. 2.0
Dec. 2009
Organized as 256Kx16
Configurable as 512Kx8 Using /UB, /LB
10
NoDelay™ Writes
Page Mode Operation to 40MHz
Advanced High-Reliability Ferroelectric Process
JEDEC 256Kx16 SRAM Pinout
55 ns Access Time, 110 ns Cycle Time
Software Programmable Block Write Protect
nonvolatile
14
DD
Read/Write Cycles
min. The memory is protected against an
disadvantages,
memory applications requiring
and
system
DD
design
drops
Superior to Battery-backed SRAM Modules
Low Power Operation
Industry Standard Configuration
The device is available in a 48-ball FBGA package.
Device specifications are guaranteed over industrial
temperature range –40°C to +85°C.
Pin Configuration
FM22LD16-55-BG
FM22LD16-55-BGTR
No Battery Concerns
Monolithic Reliability
True Surface Mount Solution, No Rework Steps
Superior for Moisture, Shock, and Vibration
2.7V – 3.6V Power Supply
Low Standby Current (90µA typ.)
Low Active Current (8 mA typ.)
Industrial Temperature -40 C to +85 C
48-ball “Green”/RoHS FBGA package
Pin compatible with FM21LD16 (2Mb) and
FM23MLD16 (8Mb)
G
A
B
C
D
E
F
H
1850 Ramtron Drive, Colorado Springs, CO 80921
DQ14
DQ15
DQ8
DQ9
VSS
VDD
Ordering Information
/LB
NC
1
Top View (Ball Down)
DQ10
DQ11
DQ12
DQ13
/OE
/UB
NC
A8
2
Ramtron International Corporation
A17
A14
A12
NC
(800) 545-FRAM, (719) 481-7000
A0
A3
A5
A9
3
55 ns access, 48-ball
“Green”/RoHS FBGA
55 ns access, 48-ball
“Green”/RoHS FBGA,
Tape & Reel
A16
A15
A13
A10
A1
A4
A6
A7
4
http://www.ramtron.com
DQ1
DQ3
DQ4
DQ5
/WE
/CE
A11
A2
5
VDD
DQ0
DQ2
VSS
DQ6
DQ7
NC
NC
6
Page 1 of 14

Related parts for FM22LD16_09

FM22LD16_09 Summary of contents

Page 1

Pre-Production FM22LD16 4Mbit F-RAM Memory Features 4Mbit Ferroelectric Nonvolatile RAM Organized as 256Kx16 Configurable as 512Kx8 Using /UB, / Read/Write Cycles NoDelay™ Writes Page Mode Operation to 40MHz Advanced High-Reliability Ferroelectric Process SRAM Compatible JEDEC 256Kx16 SRAM Pinout ...

Page 2

Pin Description Pin Name Type Pin Description A(17:0) Input Address inputs: The 18 address lines select one of 262,144 words in the F-RAM array. The lowest two address lines A(1:0) may be used for page mode read and write operations. ...

Page 3

Functional Truth Table /CE /WE A(17: Change L H Change Change X X Notes: 1) H=Logic High, L=Logic Low, V=Valid Data, X=Don’t Care. 2) /WE-controlled ...

Page 4

Overview The FM22LD16 is a wordwide F-RAM memory logically organized as 262,144 x 16 and accessed using an industry standard parallel interface. All data written to the part is immediately nonvolatile with no delay. The device offers page mode operation ...

Page 5

Precharge Operation The precharge operation is an internal condition in which the state of the memory is being prepared for a new access. Precharge is user-initiated by driving ...

Page 6

For example, the following sequence write-protects addresses from 18000h to 27FFFh (sectors 3 & 4): Address Data Read 24555h Read 3AAAAh Read 02333h Read 1CCCCh Read 000FFh Read 3EF00h Write 3AAAAh 18h Write 1CCCCh E7h Write 0FF00h Read 00000h Rev. ...

Page 7

Software Write Protect Timing SRAM Drop-In Replacement The FM22LD16 has been designed drop-in replacement for standard asynchronous SRAMs. The device does not require /CE to toggle for each new address. /CE may remain low indefinitely. While /CE ...

Page 8

Electrical Specifications Absolute Maximum Ratings Symbol Description V Power Supply Voltage with respect Voltage on any signal pin with respect Storage Temperature STG T Lead Temperature (Soldering, 10 seconds) LEAD V Electrostatic ...

Page 9

Read Cycle AC Parameters ( Symbol Parameter t Read Cycle Time RC t Chip Enable Access Time CE t Address Access Time AA t Output Hold Time OH t Page Mode ...

Page 10

Power Cycle Timing ( Symbol Parameter t Power-Up (after Last Write (/WE high) to Power Down Time Rise Time Fall ...

Page 11

Page Mode Read Cycle Timing Although sequential column addressing is shown not required. Write Cycle Timing 1 (/WE-Controlled) Write Cycle Timing 2 (/CE-Controlled) CE A(17:0) WE DQ(15:0) UB/LB Rev. 2.0 Dec. 2009 Note: /OE (not shown) is low ...

Page 12

Write Cycle Timing 3 (/CE low) Note: /OE (not shown) is low only to show effect of / pins Page Mode Write Cycle Timing Although sequential column addressing is shown not required. Power Cycle Timing Rev. ...

Page 13

Mechanical Drawing 48-ball FBGA (0.75mm ball pitch) 48 FBGA Package Marking Scheme Legend: RAMTRON XXXXXX= part number, S=speed, P=package XXXXXXX-S-P LLLLLL= lot code, YY=year, WW=work week LLLLLLL YYWW Examples: FM22LD16, “Green”/RoHS FBGA package, Lot C8556953BG1, Year 2008, Work Week 44 ...

Page 14

Revision History Revision Date 1.0 10/2/2008 1.1 2/18/2009 2.0 12/22/2009 Rev. 2.0 Dec. 2009 Summary Initial release. Added UB/LB signals to timing diagrams and added timing parameters to AC table. Added tape & reel ordering information. Changed status to Pre-Production. ...

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