FM24C64_05 RAMTRON [Ramtron International Corporation], FM24C64_05 Datasheet
FM24C64_05
Related parts for FM24C64_05
FM24C64_05 Summary of contents
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FM24C64 64Kb FRAM Serial Memory Features 64K bit Ferroelectric Nonvolatile RAM Organized as 8,192 x 8 bits 12 High Endurance 1 Trillion (10 ) Read/Writes 45 Year Data Retention NoDelay™ Writes Advanced High-Reliability Ferroelectric Process Fast Two-wire Serial Interface Up ...
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Counter SDA Serial to Parallel Converter SCL WP Control Logic A0-A2 Pin Description Pin Name I/O Pin Description A0-A2 Input Address 2-0: These pins are used to select one devices of the same type on the ...
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Overview The FM24C64 is a serial FRAM memory. The memory array is logically organized as a 8,192 x 8 bit memory array and is accessed using an industry standard two-wire interface. Functional operation of the FRAM is similar to serial ...
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Stop Condition A Stop condition is indicated when the bus master drives SDA from low to high while the SCL signal is high. All operations must end with a Stop condition operation is pending when a stop is ...
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Device Slave Select R Figure 4. Slave Address Addressing Overview After the FM24C64 (as receiver) acknowledges the device address, the master can place the memory address ...
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By Master Start DEVICE ADDRESS S By FM24C64 By Master Start DEVICE ADDRESS FM24C64 Read Operation There are two basic types of read operations. They are current address read and selective address read current ...
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By Master By FM24C64 Address By Master Start DEVICE ADDRESS S By FM24C64 By Master Start DEVICE ADDRESS ADDRESS MSB FM24C64 Endurance Internally, a FRAM operates with a read and restore mechanism. Therefore, ...
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Electrical Specifications Absolute Maximum Ratings Symbol V Power Supply Voltage with respect Voltage on any signal pin with respect Storage temperature STG T Lead temperature (Soldering, 10 seconds) LEAD V Electrostatic Discharge ...
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AC Parameters ( Symbol Parameter f SCL Clock Frequency SCL t Clock Low Period LOW t Clock High Period HIGH t SCL Low to SDA Data Out Valid AA t Bus ...
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AC Test Conditions Input Pulse Levels Input rise and fall times Input and output timing levels Diagram Notes All start and stop timing parameters apply to both read and write cycles. Clock specifications are identical for read and write cycles. ...
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Mechanical Drawing 8-pin SOIC (JEDEC Standard MS-012 variation AA) Pin 1 4.90 0.10 ± 1.27 0.33 0.51 Refer to JEDEC MS-012 for complete dimensions and notes. All dimensions in millimeters. SOIC Package Marking Scheme Legend: XXXX= part number, P= package ...
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Revision History Revision Date 0.1 10/4/99 1.0 12/7/99 1.1 7/2/00 2.1 1/22/02 2.2 4/26/02 2.3 8/5/03 2.4 3/17/04 3.0 3/29/05 Rev. 3.0 Mar. 2005 Summary Initial Release Changed to Preliminary status. Removed Endurance chart. Changed to Production status. Added clarification ...