IDT7026L IDT [Integrated Device Technology], IDT7026L Datasheet - Page 13

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IDT7026L

Manufacturer Part Number
IDT7026L
Description
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM
Manufacturer
IDT [Integrated Device Technology]
Datasheet

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IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM
TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT READ AND
NOTES:
1. To ensure that the earlier of the two ports wins. t
2.
3.
4. If M/
5. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from port "A".
TIMING WAVEFORM OF WRITE WITH BUSY (M/
NOTES:
1. t
2.
DATA
CE
OE
BUSY
DATA
WH
ADDR
ADDR
BUSY
L
= V
must be met for both
=
S
R/
OUT "B"
= V
CE
is asserted on port "B" blocking R/
IL
IN "A"
W
for the reading port.
R
IL
"A"
"A"
"B"
"B"
= V
(slave),
IL.
t
APS
BUSY
(1)
BUSY
is an input. Then for this example
input (SLAVE) and output (MASTER).
BUSY
R/
R/
W
W
"A"
"B"
"B"
W
"B"
, until
APS
BUSY
is ignored for M/
t
"B"
WB
t
goes High.
BUSY
(3)
BAA
MATCH
"A"
S
t
= V
WC
= V
6.17
t
S S S S S
WP
IH
IL
(2)
and
= V
(slave).
BUSY
IL
)
t
WP
"B"
MILITARY AND COMMERCIAL TEMPERATURE RANGES
input is shown above.
t
MATCH
DW
t
WDD
t
WH
VALID
BUSY
BUSY
BUSY
BUSY
BUSY
2939 drw 13
(1)
t
DDD (3)
(M/
S S S S S
t
BDA
= V
t
DH
IH
)
(2,4,5)
2939 drw 12
t
BDD
VALID
13

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