IDT7026L IDT [Integrated Device Technology], IDT7026L Datasheet - Page 8

• Manufacturer Part Number: IDT7026L
• Description: HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM
• Manufacturer: IDT [Integrated Device Technology]

IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM
WAVEFORM OF READ CYCLES
NOTES:
1. Timing depends on which signal is asserted last,
2. Timing depends on which signal is de-asserted first
3. t
4. Start of valid data depends on which timing becomes effective last t
5.
TIMING OF POWER-UP POWER-DOWN
DATA
BUSY
BUSY
SEM
BDD
UB
ADDR
delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations
R/
,
OUT
OUT
= V
OE
CE
LB
has no relation to valid output data.
W
IH
.
I
I
CC
CE
SB
t
t
t
t
AA
ACE
AOE
t
LZ
ABE
(5)
(4)
(1)
OE
(4)
(4)
(4)
t
CE
,
PU
CE
,
OE
,
LB
,
, or
LB
50%
, or
t
UB
RC
UB
AOE
.
.
6.17
, t
t
BDD
ACE
, t
(3, 4)
AA
or t
t
PD
BDD
.
VALID DATA
MILITARY AND COMMERCIAL TEMPERATURE RANGES
2939 drw 07
50%
(4)
t
HZ
(2)
t
OH
2939 drw 06
8