lc72134m Sanyo Semiconductor Corporation, lc72134m Datasheet - Page 14

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lc72134m

Manufacturer Part Number
lc72134m
Description
Dual Pll Frequency Synthesizer For Fm Tuner Systems
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
Structure of the DO Output Data (serial data output)
• OUT mode
DO Output Data
Serial Data Input (IN1/IN2/IN3) t
• CL: Normal (high)
No.
1
2
3
4
IF counter selection
PLL unlocked state
Control block/data
IF counter binary
I/O port data
C19 to C0
12, I1
data
data
data
LCT
UL
• Data latched from the IFIN2/I1 input port (when L/I1 is 0) and the I/O port IO2 pin. The I2 data reflects the
• Indicates the state of the unlocked state detection circuit.
• Indicates the value of the IF counter (20-bit binary counter).
• Data that reflects the LCTS bit in the serial input data. The LCT output data allows applications to verify the
pin state regardless of the I/O port mode (input or output). The data is latched at the point the circuit enters
data output mode (OUT mode).
The data is latched at the point the circuit enters data output mode (OUT mode).
IF counter input pin selection (IFIN1 or IFIN2).
I1
I2
UL
UL
C19
C0
LCT = 0: IFIN1 selected.
LCT = 1: IFIN2/I1 selected.
IFIN2/I1 pin state
The IO2 pin state
0: When the PLL is unlocked.
1: When the PLL is locked or in the detection disabled mode.
LSB of the binary counter
MSB of the binary counter
SU
, t
HD
, t
EL
, t
H : 1
L : 0
ES
, t
EH
LC72134M
≥ 0.75 µs t
Description
LC
< 0.75 µs
No. 5814-14/27
Related data
UL0, UL1
ULa, ULb
LCTS
IOC2
CTE
GT0
GT1
L/I1

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