lc72134m Sanyo Semiconductor Corporation, lc72134m Datasheet - Page 6

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lc72134m

Manufacturer Part Number
lc72134m
Description
Dual Pll Frequency Synthesizer For Fm Tuner Systems
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
Continued from preceding page.
AOUTa
AMIN
AINa
BO1
BO2
BO3
BO4
PDa
V
V
IO2
DO
Pin
CE
CL
DI
DD
SS
Pin No.
17
19
23
14
16
20
21
22
2
3
4
5
6
7
8
Main PLL
local oscillator
signal input
Chip enable
Input data
Clock
Output data
Power supply
Ground
Output ports
I/O port
Main PLL
charge pump
output
Main PLL low-
pass filter
amplifier
transistor
Type
• AMIN is selected when DVS in the serial data is set to 0.
• When SNS in the serial data is set to 1:
• When SNS in the serial data is set to 0:
• This pin must be set high to enable serial data input (DI) or serial data output
• Input for serial data transferred from the controller
• Clock used for data synchronization for serial data input (DI) and serial data
• Output for serial data transmitted to the controller. The content of the data
• LC72134M power supply (V
• The power on reset circuit operates when power is first applied.
• LC72134M ground
• Output-only ports
• The output state is determined by BO1 through BO4 in the serial data.
• A time base signal (8 Hz) is output from BO1 when TBC in the serial data is set to
• Shared function I/O port
• The pin function is determined by IOC2 in the serial data.
• When specified to function as an input port:
• When specified to function as an output port:
• This pin is set to input mode after a power on reset.
• PLL charge pump output
• Connections for the n-channel MOS transistor to be used for the PLL active low-
• Input frequency: 2 to 40 MHz
• The signal is input to the swallow counter directly.
• The divisor can be set to a value in the range 272 to 65535. The set value
• Input frequency: 0.5 to 10 MHz
• The signal is input to a 12-bit programmable divider directly.
• The divisor can be set to a value in the range 5 to 4095. The set value becomes
(DO).
output (DO).
transmitted is determined by DOC0 through DOC2.
When the data value is 0: The output state will be the open circuit state.
When the data value is 1: The output state will be a low level.
1.
When the data value = 0: Input port
When the data value = 1: Output port
The input pin state is reported to the controller through the DO pin.
When the input state is low: The data will be 0:
When the input state is high: The data will be 1:
The output state is determined by IO2 in the serial data.
When the data value is 0: The output state will be the open circuit state.
When the data value is 1: The output state will be a low level.
A high level is output when the frequency of the local oscillator signal divided by N
is higher than the reference frequency, and a low level is output when that
frequency is lower. This pin goes to the high-impedance state when the
frequencies match.
pass filter.
becomes the actual divisor.
the actual divisor.
DD
LC72134M
= 4.5 to 5.5 V)
Function
Continued on next page.
Equivalent circuit
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No. 5814-6/27

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