74HC132D,653 NXP Semiconductors, 74HC132D,653 Datasheet - Page 12
![IC TRIGGER NAND QUAD 2IN 14SOIC](/photos/6/57/65749/14-soic-sot108-1_sml.jpg)
74HC132D,653
Manufacturer Part Number
74HC132D,653
Description
IC TRIGGER NAND QUAD 2IN 14SOIC
Manufacturer
NXP Semiconductors
Series
74HCr
Datasheets
1.74HCT4046ADB112.pdf
(19 pages)
2.74HCT4046ADB112.pdf
(23 pages)
3.74HC132N652.pdf
(8 pages)
Specifications of 74HC132D,653
Number Of Circuits
4
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Logic Type
NAND Gate - Schmitt Trigger
Number Of Inputs
2
Current - Output High, Low
7.8mA, 7.8mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Product
NAND
Logic Family
HC
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Propagation Delay Time
11 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Logical Function
NAND
Number Of Elements
4
Operating Supply Voltage (typ)
5V
Operating Temp Range
-40C to 125C
Package Type
SO
Number Of Outputs
1
Technology
CMOS
Mounting
Surface Mount
Pin Count
14
Operating Temperature Classification
Automotive
Quiescent Current
2uA
Operating Supply Voltage (max)
6V
Operating Supply Voltage (min)
2V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1394-2
74HC132D-T
933714130653
74HC132D-T
933714130653
Philips Semiconductors
Test circuit for 74HC
HCT TYPES
AC waveforms 74HCT
March 1988
handbook, full pagewidth
HCMOS family characteristics
Switch position
Note
1. For open-drain N-channel outputs t
TEST
t
t
t
t
C
R
PZH
PZL
PHZ
PLZ
L
T
=
=
Fig.8 Input rise and fall times, transition times and propagation delays for combinatorial logic ICs.
load capacitance including jig and probe capacitance
(see AC CHARACTERISTICS for values).
termination resistance should be equal to the output impedance Z
the pulse generator.
SWITCH
GND
V
GND
V
CC
CC
handbook, halfpage
GENERATOR
PULSE
INPUT
OUTPUT
Fig.7 Test circuit for 3-state outputs.
PLZ
and t
V I
t PHL
t THL
10%
90%
PZL
R T
t r
1.3 V
are applicable.
90%
1.3 V
10%
D.U.T
V CC
12
o
of
t f
V O
C L
t PLH
t TLH
R L = 1 k
50 pF
MGK567
FAMILY SPECIFICATIONS
3 V
GND
MGK563
V CC