cxd2548r Sony Electronics, cxd2548r Datasheet - Page 50

• Manufacturer Part Number: cxd2548r
• Description: Cd Digital Signal Processor With Built-in Digital Servo And Dac
• Manufacturer: Sony Electronics

2-2. Subcode Interface
There are two methods for reading out a subcode externally.
The 8-bit subcodes P to W can be read out from SBSO by inputting EXCK to the CXD2584R.
Sub Q can be read out after checking CRC of the 80 bits in the subcode frame.
Sub Q can be read out from the SQSO pin by inputting 80 clock pulses to the SQCK pin when SCOR comes
correctly and CRCF is high.
P to W Subcode Readout
80-bit Sub Q Readout
• First, Sub Q, regenerated at one bit per frame, is input to the 80-bit serial/parallel register and the CRC check
• 96-bit Sub Q is input, and if the CRC is OK, it is output to SQSO with CRCF = 1. In addition, 80 bits are
• When the 80-bit data is loaded, the order of the MSB and LSB is inverted within each byte. As a result,
• Once the 80-bit data load is confirmed, SQCK is input so that the data can be read.
• The retriggerable monostable multivibrator has a time constant from 270 to 400µs. When the duration when
• While the monostable multivibrator is being reset, data cannot be loaded in the 80-bit parallel/serial register.
• See Timing Chart 2-17.
• The high and low intervals for SQCK should be between 750ns and 120µs.
Data can be read out by inputting EXCK immediately after WFCK falls. (See Timing Chart 2-16.)
Fig. 2-2 shows the peripheral block of the 80-bit Sub Q register.
circuit.
loaded into the parallel/serial register.
When SQSO goes high 400µs (monostable multivibrator time constant) or more after subcode readout, the
CPU determines that new data (which passed the CRC check) has been loaded.
although the sequence of the bytes is the same, the bits within the bytes are now ordered LSB first.
The SQCK input is detected, and the retriggerable monostable multivibrator is reset while the input is low.
SQCK is high is less than this time constant, the monostable multivibrator is kept reset; during this interval,
the serial/parallel register is not loaded into the parallel/serial register.
In other words, while reading out with a clock cycle shorter than this time constant, the register will not be
rewritten by CRCOK and others.
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CXD2548R