m5m4v4s40ctp-12 Mitsumi Electronics, Corp., m5m4v4s40ctp-12 Datasheet - Page 2

• Manufacturer Part Number: m5m4v4s40ctp-12
• Description: 2-bank 131072-word 16-bit Synchronous Dram
• Manufacturer: Mitsumi Electronics, Corp.

SDRAM (Rev. 0.3)
Feb ‘97 Preliminary
BLOCK DIAGRAM
Type Designation Code
M 5M 4 V 4 S 4 0 C TP - 12
4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
Register
Address Buffer
A0-8
Mode
Memory Array
BA
Bank #0
Clock Buffer
CLK CKE
MITSUBISHI ELECTRIC
Control Circuitry
M5M4V4S40CTP-12, -15
I/O Buffer
These rules are only applied to the Synchronous DRAM family.
DQ0-15
/CS /RAS /CAS /WE
Cycle Time (min.) 12: 12ns, 15: 15ns
Package Type TP: TSOP(II)
Process Generation
Function 0: Random Column, 1: 2N-rule
Organization 2 n 4: x16
Synchronous DRAM
Density 4:4M bits
Interface V:LVTTL
Memory Style (DRAM)
Use, Recommended Operating Conditions, etc
Mitsubishi Main Designation
Control Signal Buffer
Memory Array
Bank #1
DQML
DQMU
MITSUBISHI LSIs
2