lxt351 Intel Corporation, lxt351 Datasheet - Page 25

no-image

lxt351

Manufacturer Part Number
lxt351
Description
T1/e1 Short Haul Transceiver With Crystal-less Jitter Attenuation
Manufacturer
Intel Corporation
Datasheet
Datasheet
Bit
1. When enabled.
1. To enable Dual loopback (DLOOP), set both ERLOOP = 1 and ELLOOP = 1.
0
1
2
3
4
5
6
7
EC3
Bit
0
1
2
3
0
0
1
1
1
1
Table 7. Control Register #1 Read/Write, Address (A7-A0) = x010000x
Table 8.
Table 9. Control Register #2 Read/Write, Address (A7-A0) = x010001x
ENCENB
UNIENB
JASEL0
JASEL1
Name
EC1
EC2
EC3
ERLOOP
ELLOOP
EALOOP
-
Name
EC2
0
1
0
0
1
1
-
Reserved, set this bit to 0, ignore when reading.
1 = Enable Unipolar I/O mode and allow insertion/detection of BPVs.
0 = Enable Bipolar I/O mode
1 = Enable B8ZS/HDB3 encoders/decoders and force Unipolar I/O
mode.
0 = Disable B8ZS/HDB3 encoders/decoders
Select jitter attenuation circuitry position in data path or disables the
JA. See right hand section of table for codes.
Equalizer Control Input Settings
1
1
1 = Enable Remote loopback mode
0 = Disable Remote loopback mode
1 = Enable Local loopback mode
0 = Disable Local loopback mode
1 = Enable Analog loopback mode
0 = Disable Analog loopback mode
Reserved, set to 0, ignore when reading.
EC1
0
1
0
1
0
1
T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation — LXT351
(see
Sets mode (T1 or E1) and equalizer
Function
Table 8
E1
T1
T1
T1
T1
T1
Function
below for control codes).
Function
133-266 ft / 1.2 dB
266-399 ft / 1.8 dB
399-533 ft / 2.4 dB
533-655 ft / 3.0 dB
0-133 ft / 0.6 dB
Ñ
ITU Rec G.703
Pulse
EPAT0
0
0
1
1
EPAT1
75
JASEL0
0
1
0
1
1
1
0
Coax/120
100
100
100
100
100
Cable
Pattern
Jitter Attenuator
Transmit TPOS/TNEG
Detect and transmit QRSS
In-band Loop Up Code
00001
In-band Loop Down Code
001
TP
TP
TP
TP
TP
JASEL1
TP
X
0
1
Selected
Coding
Position
Transmit
Disabled
Receive
HDB3
B8ZS
B8ZS
B8ZS
B8ZS
B8ZS
1
25

Related parts for lxt351