vsc055xkm-01 Maxim Integrated Products, Inc., vsc055xkm-01 Datasheet - Page 11

• Manufacturer Part Number: vsc055xkm-01
• Description: Enhanced I?c Backplane Controller
• Manufacturer: Maxim Integrated Products, Inc.

VSC055-01
Data Sheet
2
2.1
2.2
Functional Descriptions
The VSC055-01 device is composed of five major functional blocks:
The VSC055-01 fully supports a generic two-wire serial interface and is compatible with other industry-
standard devices that support this interface at both 100 kHz and 400 kHz.
Two-Wire Serial Interface
The VSC055-01 device supports a single Slave mode two-wire serial interface. All interchip
communication to a microcontroller takes place over this bus. The interface supports a 3-bit address bus
that allows the user to select one of eight possible addresses. The address bus is compared to bits 3:1 of the
slave address byte. The slave address byte is the first byte transmitted to the device after a START
condition. The VSC055-01 supports two pin-selectable, 4-bit device type identifier values, 1000b and
1100b. The address bits and the device identifier allow the use of up to 16 devices on a single two-wire
serial interface. The serial interface control logic includes:
A read or write transaction is determined by the least significant bit (R/W) of the first byte transferred.
Write accesses require a 3-byte transfer. The first byte is the slave address with the R/W bit LOW, the
second byte contains the register address, and the third byte is the write data. Read access requires a 4-byte
transfer since data transfer direction can not change after receipt of the slave address byte. The first byte is
the slave address with the R/W bit LOW, the second byte contains the register address, the third byte is a
repeated slave address with the R/W bit HIGH, and the fourth byte is the read data. If the transaction is a
write, the data will be latched into the appropriate register during the acknowledge of the third byte. All
transactions to or from the device complete during the acknowledge of the third byte allowing the user to
immediately initiate another transfer to the device. Sequential read or write transactions are allowed and
are extensions of the above protocol with additional data bytes added to the end of the transaction. All
sequential transactions cause the internal address to increment by one, regardless of the register address.
Control Registers
The VSC055-01 device contains six groups of control registers. Each group supports a specific function
within the device as follows:
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a Slave mode two-wire serial interface
a block of control registers
general-purpose I/O and specialized port bypass control logic
a clock generator
power-on reset control logic
a slave state machine
address comparison logic
serial-to-parallel and parallel-to-serial conversion
register read/write control
filtering for the clock and data line
the first group is the port data registers
the second group is the data direction registers
the third group contains special bit control features
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January 2008
Revision 4.1