dm9000b Davicom Semiconductor, Inc., dm9000b Datasheet - Page 36

• Manufacturer Part Number: dm9000b
• Description: Ethernet Controller With General Processor Interface
• Manufacturer: Davicom Semiconductor, Inc.

8.11 Power down Control Register (PWDOR) - 19
* When selected, the power down value is control by Register 20.0
8.12 (Specified config) Register – 20
Final
Version: DM9000B-13-DS-F02
June 4, 2009
19.15
20.15
20.14
20.13
20.12
20.10
-19.9
20.11
19.8
19.7
19.6
19.5
19.4
19.3
19.2
19.1
19.0
20.9
20.8
20.7
20.6
20.5
Bit
Bit
FORCE_TXSD
Mdix_fix Value
AutoNeg_lpbk
PREAMBLEX
TX10M_PWR
FORCE_FEF
NWAY_PWR
PD10DRV
MDIX_CNTL
Bit Name
Reserved
PD100DL
PDchip
PDcom
Bit Name
Reserved
PDaeq
PDedo
PDdrv
PDedi
TSTSE1
TSTSE2
PD10
MDI/MDIX,RO The polarity of MDI/MDIX value
Default
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RO
Default
0, RW
0, RO
0,RW
0,RW
0,RW
0,RW
0,RW
0,RW
0,RW
0,RW
Reserved
Read as 0, ignore on write
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor test select control
Vendor test select control
Force Signal Detect
1: force SD signal OK in 100M
0: normal SD signal.
Vendor test select control
Preamble Saving Control
0: when bit 10 is set, the 10BASE-T transmit preamble count is
1: transmit preamble bit count is normal in 10BASE-T mode
10BASE-T mode Transmit Power Saving Control
1: enable transmit power saving in 10BASE-T mode
0: disable transmit power saving in 10BASE-T mode
Auto-negotiation Power Saving Control
1: disable power saving during auto-negotiation period
0: enable power saving during auto-negotiation period
Reserved
Read as 0, ignore on write
1: MDIX mode
0: MDI mode
Auto-negotiation Loop-back
1: test internal digital auto-negotiation Loop-back
0: normal.
MDIX_CNTL force value:
When Mdix_down = 1, MDIX_CNTL value depend on the register
value.
reduced. When bit 11 of register 1DH is set, 12-bit preamble is
reduced; otherwise 22-bit preamble is reduced.
Ethernet Controller with General Processor Interface
Description
Description
DM9000B
36