dm9000bi Davicom Semiconductor, Inc., dm9000bi Datasheet - Page 35

• Manufacturer Part Number: dm9000bi
• Description: Industrial-grade Ethernet Controller With General Processor Interface
• Manufacturer: Davicom Semiconductor, Inc.

8.10 10BASE-T Configuration/Status (10BTCSR) - 18
Preliminary
Version: DM9000BI-13-DS-P02
January 17, 2008
18.15
18.14
18.13
18.12
18.10
18.11
-17.4
-17.0
-18.1
17.3
18.9
18.0
Bit
ANMB[3:0]
SQUELCH
Bit Name
Reserved
Reserved
Reserved
LP_EN
JABEN
POLR
:0]
HBE
0, RO
RW
Default
1, RW
1, RW
1, RW
0, RW
0, RO
0, RO
0, RO
1,RW
Industrial-grade Ethernet Controller with General Processor Interface
The first PHY address bit transmitted or received is the MSB of the
address (bit 4). A station management entity connected to multiple PHY
entities must know the appropriate address of each PHY
Auto-negotiation Monitor Bits
These bits are for debug only. The auto-negotiation status will be written
to these bits.
Reserved
Read as 0, ignore on write
Link Pulse Enable
1 = Transmission of link pulses enabled
0 = Link pulses disabled, good link condition forced
This bit is valid only in 10Mbps operation
Heartbeat Enable
1 = Heartbeat function enabled
0 = Heartbeat function disabled
When the DM9000BI is configured for full duplex operation, this bit will
be ignored (the collision/heartbeat function is invalid in full duplex
mode), This bit is valid only in 10Mbps operation.
Squelch Enable
1 = Normal squelch
0 = Low squelch
Jabber Enable
Enables or disables the Jabber function when the DM9000BI is in
10BASE-T full duplex or 10BASE-T transceiver Loop-back mode
1 = Jabber function enabled
0 = Jabber function disabled
Reserved
Force to 0, in application.
Reserved
Read as 0, ignore on write
Polarity Reversed
When this bit is set to 1, it indicates that the 10Mbps cable polarity is
reversed. This bit is automatically set and cleared by 10BASE-T
module
B3 b2 b1 B0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
In IDLE state
Ability match
Acknowledge match
Acknowledge match fail
Consistency match
Consistency match fail
Parallel detects signal_link_ready
Parallel detects signal_link_ready fail
Auto-negotiation completed successfully
Description
DM9000BI
35