dm9000bi Davicom Semiconductor, Inc., dm9000bi Datasheet - Page 46

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dm9000bi

Manufacturer Part Number
dm9000bi
Description
Industrial-grade Ethernet Controller With General Processor Interface
Manufacturer
Davicom Semiconductor, Inc.
Datasheet

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10.3.4 Processor I/O Read Timing
*Note:(The default clk period is 20ns)
1. The IO16 is valid when the SD bus width is 16-bit and the system address is DATA port (i.e. CMD is high) and
2. 19ns for bus driving 2mA, 12ns for 4mA, 10ns for 6mA, 10ns for 8mA.
Preliminary
Version: DM9000BI-13-DS-P02
January 17, 2008
Symbol
T
T
the value of INDEX port is memory data register index.(ex. F0H, F2H, F6H or F8H)
2
2
T
T
T
T
T
T
T
T
+T
+T
1
2
3
4
5
6
7
8
6
6
CS#,CMD valid to IOR# valid
IOR# width
System Data(SD) Delay time
IOR# invalid to System Data(SD) invalid
IOR# invalid to CS#,CMD invalid
IOR# invalid to next IOR#/IOW# valid
When read DM9000BI register
IOR# valid to next IOR#/IOW# valid
When read DM9000BI memory with F0h register
IOR# valid to next IOR#/IOW# valid
When read DM9000BI memory with F2h register
CS#,CMD valid to IO16 valid
CS#,CMD invalid to IO16 invalid
CS#,CMD
IO16
SD
IOR#
T1
Parameter
Industrial-grade Ethernet Controller with General Processor Interface
T3
T7
T2
T4
T5
T6
Min.
10
0
0
2
4
1
T8
Typ.
DM9000BI
Max.
19
6
5
5
ns *2
Unit
clk*
clk*
clk*
ns
ns
ns
ns
ns
ns
46

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