74AHC132PW,118 NXP Semiconductors, 74AHC132PW,118 Datasheet

IC QUAD 2IN NAND SCHIMTT 14TSSOP

74AHC132PW,118

Manufacturer Part Number
74AHC132PW,118
Description
IC QUAD 2IN NAND SCHIMTT 14TSSOP
Manufacturer
NXP Semiconductors
Series
74AHCr
Datasheets

Specifications of 74AHC132PW,118

Number Of Circuits
4
Package / Case
14-TSSOP
Logic Type
NAND Gate - Schmitt Trigger
Number Of Inputs
2
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Product
NAND
Logic Family
74AHC
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Propagation Delay Time
3.3 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Output Current
25 mA
Power Dissipation
500 mW
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AHC132PW-T
74AHC132PW-T
935262991118
1. General description
2. Features
3. Ordering information
Table 1.
Type number
74AHC132
74AHC132D
74AHC132PW
74AHC132BQ
Ordering information
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7-A.
The 74AHC132; 74AHCT132 contains four 2-input NAND gates which accept standard
input signals. They are capable of transforming slowly changing input signals into sharply
defined, jitter free output signals. The gate switches at different points for positive-going
and negative-going signals. The difference between the positive voltage V
negative V
I
I
I
I
I
I
74AHC132; 74AHCT132
Quad 2-input NAND Schmitt trigger
Rev. 06 — 4 May 2009
Balanced propagation delays
Inputs accept voltages higher than V
Input levels:
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
N
N
N
N
N
For 74AHC132: CMOS level
For 74AHCT132: TTL level
HBM EIA/JESD22-A114E exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101C exceeds 1000 V
T
is defined as the hysteresis voltage V
SO14
TSSOP14
DHVQFN14 plastic dual in-line compatible thermal enhanced very
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
thin quad flat package; no leads; 14 terminals;
body 2.5
3
CC
0.85 mm
H
.
Product data sheet
T+
and the
Version
SOT108-1
SOT402-1
SOT762-1

Related parts for 74AHC132PW,118

74AHC132PW,118 Summary of contents

Page 1

Quad 2-input NAND Schmitt trigger Rev. 06 — 4 May 2009 1. General description The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL specified in compliance with ...

Page 2

... NXP Semiconductors Table 1. Ordering information Type number Package Temperature range Name 74AHCT132 74AHCT132D +125 C 74AHCT132PW +125 C 74AHCT132BQ +125 C 4. Functional diagram Fig 1. Logic symbol Fig 3. Logic diagram (one Schmitt trigger) 74AHC_AHCT132_6 Product data sheet 74AHC132; 74AHCT132 …continued Description SO14 plastic small outline package; 14 leads; ...

Page 3

... NXP Semiconductors 5. Pinning information 5.1 Pinning 132 GND 7 Fig 4. Pin configuration SO14 and TSSOP14 5.2 Pin description Table 2. Pin description Symbol Pin GND 74AHC_AHCT132_6 Product data sheet mna406 Fig 5. Description data input A data input B data output Y data input A data input B ...

Page 4

... NXP Semiconductors 6. Functional description [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage ...

Page 5

... NXP Semiconductors 8. Recommended operating conditions Table 5. Operating conditions Symbol Parameter 74AHC132 V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 74AHCT132 V supply voltage CC V input voltage I V output voltage O T ambient temperature ...

Page 6

... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions C output O capacitance 74AHCT132 V HIGH-level output voltage 8 LOW-level output voltage 8 input leakage GND current 5 supply current 5 additional per input pin; CC supply current 4 5 input ...

Page 7

... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 74AHCT132 4 5 propagation nA nY; see pd delay power MHz dissipation capacitance [1] Typical values are measured at nominal supply voltage (V [ the same as t and PLH PHL ...

Page 8

... NXP Semiconductors Test data is given in Table Definitions test circuit termination resistance should be equal to output impedance load capacitance including jig and probe capacitance. L Fig 7. Load circuitry for measuring switching times Table 9. Test data Type Input V I 74AHC132 V CC 74AHCT132 3.0 V 74AHC_AHCT132_6 Product data sheet ...

Page 9

... NXP Semiconductors 12. Transfer characteristics Table 10. Transfer characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 74AHC132 V positive-going threshold T+ voltage V negative-going threshold T voltage V hysteresis voltage H 74AHCT132 V positive-going threshold T+ voltage V negative-going threshold T voltage V hysteresis voltage H 13. Transfer characteristics waveforms Fig 8. ...

Page 10

... NXP Semiconductors 1 (mA Fig 10. Typical 74AHC132 transfer characteristics 74AHC_AHCT132_6 Product data sheet 74AHC132; 74AHCT132 mna411 I CC (mA ( (mA Rev. 06 — 4 May 2009 Quad 2-input NAND Schmitt trigger 4 mna413 6 V (V) I © NXP B.V. 2009. All rights reserved. mna412 ...

Page 11

... NXP Semiconductors (mA 4 Fig 11. Typical 74AHCT132 transfer characteristics 14. Application information For 74AHC132 For 74AHCT132: T Fig 12. Relaxation oscillator 74AHC_AHCT132_6 Product data sheet mna414 ( ------------------------ - 0. ------------------------ - 0.60 RC Rev. 06 — 4 May 2009 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger (mA 5 001aac440 mna415 6 V (V) I © NXP B.V. 2009. All rights reserved. ...

Page 12

... NXP Semiconductors 15. Package outline SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.01 0.069 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 13

... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 14

... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 15

... NXP Semiconductors 16. Abbreviations Table 11. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model 17. Revision history Table 12. Revision history Document ID Release date ...

Page 16

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 17

... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 12 Transfer characteristics Transfer characteristics waveforms Application information ...

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