PLL502-00 PhaseLink (PLL), PLL502-00 Datasheet

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PLL502-00

Manufacturer Part Number
PLL502-00
Description
, 12-25MHz In, 12-200MHz Out, CMOS
Manufacturer
PhaseLink (PLL)
Datasheet
FEATURES
DESCRIPTION
The PLL502-00 is a monolithic low jitter and low
phase noise (-130dBc @10kHz offset at 44MHz
output), high performance CMOS VCXO IC Die,
using a low cost crystal (12-25MHz).
The same die can be used as a VCXO with output
frequencies ranging from F
selector pad bonding options (see Divider Selection
Table on this page). This makes the PLL502-00 ideal
for a wide range of applications from 12MHz to
190MHz (including 27MHz, 35.328MHz, 77.76MHz
and 155.52MHz, etc.).
BLOCK DIAGRAM
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
XIN
VCON
DIE SPECIFICATIONS
Pad dimensions
Integrated voltage-controlled crystal oscillator
circuitry (VCXO) (pull range 500ppm minimum).
Low phase noise (-130dBc @ 10kHz offset at
44MHz output)
selectable frequency multipliers (x2, x4, x1, x8).
3.3V supply voltage.
Uses inexpensive fundamental-mode parallel
resonant crystals (from 12 to 25MHz).
Selectable High Drive (36mA drive capability at
TTL level) or Standard Drive (12mA drive
capability at TTL) output.
Available in DIE (65 mil x 62 mil).
Reverse side
Thickness
Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals
Name
Size
VCXO
80 micron x 80 micron
XIN
Selectable
x 1 to F
62 x 65 mil
PLL
Value
10 mil
GND
XIN
x 8 using
CLK
DIE CONFIGURATION
MULTIPLIER SELECTION
Note: - Selector pads default to ‘0’, wire bond to VDD to set to ‘1’
PAD DESCRIPTION
FS[0:2]
S2
VCON
Y
Name
0
0
0
0
1
1
1
1
GND
XTB
VDD
CLK
OE
SELECTION
XT
X
- (*) High-drive output
(0,0)
S1
0
0
1
1
0
0
1
1
27
29
31
OE
25
18,19,20
21,22,23
Number
XT
VCON
XTB
7,10
S0
27
29
31
13
25
0
1
0
1
0
1
0
1
VDD
23
12MHz – 25MHz
VDD
21
Crystal input connection.
Crystal connection.
Voltage Control Input.
Ground.
Clock Output.
Frequency selection pad
3.3V Power Supply.
Output Enable: ‘0’ to disable
(tri-state output), 1’ (default
value when not connected) to
enabled the output.
65 mil
FS0
20
F
PLL502-00
XIN
Description
FS1
19
GND
7
FS2
18
GND
CLK
Rev 4/01/02 Page 1
13
10
CLK (MHz)
(1550,1475)
F
F
F
F
F
F
F
F
XIN
XIN
XIN
XIN
XIN
XIN
XIN
XIN
x 1*
x 2*
x 4*
x 8*
x 2
x 4
x 1
x 8

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PLL502-00 Summary of contents

Page 1

... TTL level) or Standard Drive (12mA drive capability at TTL) output. Available in DIE (65 mil x 62 mil). DESCRIPTION The PLL502- monolithic low jitter and low phase noise (-130dBc @10kHz offset at 44MHz output), high performance CMOS VCXO IC Die, using a low cost crystal (12-25MHz). The same die can be used as a VCXO with output ...

Page 2

... 12mA (low drive -4mA (low drive) OHC OH At TTL level (High drive) At TTL level (Low drive) VCON Human Body Model, all pads except XT and XTB Human Body Model, XT and XTB pads PLL502-00 MIN. MAX 0 ...

Page 3

... VCON 3.3V 0V VCON 3.3V, -3dB SYMBOL CONDITIONS Parallel Fundamental Mode F XIN (xtal) At Vcon = 1.65V C L (xtal) AT cut cut R E PLL502-00 MIN. TYP. MAX. UNITS 12 25 MHz 1.15 3.7 0.5 1 MIN. TYP. MAX. UNITS 10 500 250 165 ppm/V 10 2000 25 MIN. ...

Page 4

... VDD and GND. 44MHz @100Hz offset 44MHz @1kHz offset 44MHz @10kHz offset 44MHz @100kHz offset 44MHz @1MHz offset 155MHz @100Hz offset 155MHz @1kHz offset 155MHz @10kHz offset 155MHz @100kHz offset 155MHz @1MHz offset PLL502-00 MIN. TYP. MAX. UNITS -80 dBc/Hz ...

Page 5

... Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL502- PLL502-00 TEMPERATURATRE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE D=DIE Rev 4/01/02 Page 5 ...

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