PLL502-04 PhaseLink (PLL), PLL502-04 Datasheet
PLL502-04
Related parts for PLL502-04
PLL502-04 Summary of contents
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... Low jitter (RMS): 15ps period. 3.3V operation. Available in 8-Pin TSSOP or SOIC. DESCRIPTIONS The PLL502- low cost, high performance and low phase noise VCXO for the 96 to 200MHz range. The very low jitter (15 ps RMS period jitter at 155.52MHz) makes this chip ideal for applications requiring voltage controlled frequency sources in CMOS ...
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... Frequency control voltage input pin. P Ground pin. O Output clock pin. P +3.3V VDD power supply pin. Output enable input pin. Disables (tri-state) output when low. Internal pull enables output by default if pin is not connected to low. I Crystal input pin. SYMBOL PLL502-04 Description MIN. MAX 0 0 0.5 V ...
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... VIN 3.3V 0V VIN 3.3V, -3dB CONDITIONS At 155MHz with capacitive decoupling between VDD and GND. 155.52MHz @100Hz offset 155.52MHz @1kHz offset 155.52MHz @10kHz offset 155.52MHz @100kHz offset 155.52MHz @1MHz offset PLL502-04 MIN. TYP. MAX 1.15 3.7 0.5 1 MIN. TYP. MAX. 10 500 ...
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... 12mA (low drive -4mA (low drive) OHC OH At TTL level (High drive) At TTL level (Low drive) Human Body Model SYMBOL MIN. TYP XIN C (xtal PLL502-04 MIN. TYP. MAX. 20 3.13 2.4 V – 0 3000 MAX. UNITS 25 MHz 9.5 pF ...
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... Preliminary for proposal Low Phase Noise VCXO (96MHz to 200MHz) TSSOP Min. Max. - 1.20 0.05 0.15 0.19 0.30 0.09 0.20 2.90 3.10 4.30 4.50 6.20 6.60 0.45 0.75 A1 0.65 BSC e 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL502- PLL502- TEMPERATURATURE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE S=SOIC, O=TSSOP Rev 4/01/02 Page 5 ...