MTB6N60 MOTOROLA [Motorola, Inc], MTB6N60 Datasheet - Page 7
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MTB6N60
Manufacturer Part Number
MTB6N60
Description
TMOS POWER FET 6.0 AMPERES 600 VOLTS
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MTB6N60.pdf
(10 pages)
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design. The footprint for the semiconductor packages must be
the correct size to ensure proper solder connection interface
function of the drain pad size. These can vary from the
minimum pad size for soldering to a pad size given for
maximum power dissipation. Power dissipation for a surface
mount device is determined by T J(max) , the maximum rated
junction temperature of the die, R JA , the thermal resistance
from the device junction to ambient, and the operating
temperature, T A . Using the values provided on the data sheet,
P D can be calculated as follows:
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T A of 25 C, one can
calculate the power dissipation of the device. For a D 2 PAK
device, P D is calculated as follows.
recommended footprint on a glass epoxy printed circuit board
to achieve a power dissipation of 2.5 Watts. There are other
alternatives to achieving higher power dissipation from the
surface mount packages. One is to increase the area of the
drain pad. By increasing the area of the drain pad, the power
Motorola TMOS Power MOSFET Transistor Device Data
Surface mount board layout is a critical portion of the total
The power dissipation for a surface mount device is a
The values for the equation are found in the maximum
The 50 C/W for the D 2 PAK package assumes the use of the
INFORMATION FOR USING THE D 2 PAK SURFACE MOUNT PACKAGE
P D = 150 C – 25 C
P D =
RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
50 C/W
T J(max) – T A
R JA
POWER DISSIPATION FOR A SURFACE MOUNT DEVICE
10.66
0.42
= 2.5 Watts
0.33
8.38
17.02
0.63
between the board and the package. With the correct pad
geometry, the packages will self align when subjected to a
solder reflow process.
dissipation can be increased. Although one can almost double
the power dissipation with this method, one will be giving up
area on the printed circuit board which can defeat the purpose
of using surface mount technology. For example, a graph of
R JA versus drain pad area is shown in Figure 16.
an aluminum core board such as Thermal Clad . Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
Another alternative would be to use a ceramic substrate or
0.12
3.05
70
60
50
40
30
20
Figure 16. Thermal Resistance versus Drain Pad
0
2.032
Area for the D 2 PAK Package (Typical)
1.016
0.08
0.04
2
2.5 Watts
3.5 Watts
4
6.096
0.24
A, Area (square inches)
inches
5 Watts
mm
6
Board Material = 0.0625
G–10/FR–4, 2 oz Copper
8
10
MTB6N60E
12
T A = 25 C
14
7
16