CS4610 CIRRUS [Cirrus Logic], CS4610 Datasheet - Page 17

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CS4610

Manufacturer Part Number
CS4610
Description
CrystalClear SoundFusion PCI Audio Accelerator
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet

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DS241PP5
CS4610/11
CrystalClear™ SoundFusion™ PCI Audio Accelerator
SCLK
FSYNC
SDOUT
SDIN
LRCLK
SDO2, SDO3
Pin Name
Table 4. Serial Audio Port Signal Summary for CS4610 + CS423x Expanded Output Configuration
CS4610 PCI
Accelerator
Clock Gen
PLL/
ASDOUT/SDOUT
ABITCLK/SCLK
ASYNC/FSYNC
Figure 11. CS4610 + CS423x Expanded 6-Channel Output Configuration
JBB1/LRCLK
ASDIN/SDIN
JAB1/SDO2
JAB2/SDO3
MIDIIN
Direction
Output
Output
Output
Input
Input
Input
Main timing driver for digital audio link, both edges used internally for tim-
ing. Also functions as the source to the PLL for internal clock generation.
Framing signal for digital audio link, high time indicates left channel data
and low time indicates right channel data. FSYNC is sampled on the falling
edge of the SCLK input.
Primary output port serial data pin. This data is the CS4610 output stream
going to the CS423x DACs. SDOUT transitions on the rising edge of the
SCLK input.
Primary input port serial data pin. This data contains both CS423x ADC
data and the CS423x output data. SDIN is sampled on the falling edge of
the SCLK input.
Framing signal for external 4333 DACs, high time indicates left channel
data and low time indicates right channel data. LRCLK transitions on the
falling edge of the SCLK input.
Second and third output port serial data pins. These output streams are
the expanded output channels beyond the CS423x left / right pair. The
serial data on these pins transition on the falling edge of the SCLK input.
Note that this is a DIFFERENT SCLK edge than the one for the SDOUT
pin.
Analog Out Pair 2
Analog Out Pair 3
16.9344 MHz
Functional Description
16.9344
Analog Out Pair 1
Surround Left
Surround Right
Center
Sub
MCLK
SCLK
FSYNC
SDIN
SDOUT
MIDOUT
ISA Codec
CS423x
Left
Right
17

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