CS4610 CIRRUS [Cirrus Logic], CS4610 Datasheet - Page 24
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CS4610
Manufacturer Part Number
CS4610
Description
CrystalClear SoundFusion PCI Audio Accelerator
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
1.CS4610.pdf
(29 pages)
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DEVSEL# - Device Select, I/O
REQ# - Master Request, Three-State Output
GNT# - Master Grant, Input
PERR# - Parity Error, I/O
SERR# - System Error, Open Drain Output
INTA# - Host Interrupt A (for SP), Open Drain Output
PCICLK - PCI Bus Clock, Input
RST# - PCI Device Reset
VDD5REF: Clean 5 V Power Supply
24
(M) pin 20; (Q) pin 28
DEVSEL# is driven by the PCI bus target device to indicate that it has decoded the address of
the current transaction as its own chip select range.
(M) pin 85; (Q) pin 113
REQ# indicates to the system arbiter that this device is requesting access to the PCI bus. This
pin is high-impedance when RST# is active.
(M) pin 84; (Q) pin 112
GNT# is driven by the system arbiter to indicate to the device that the PCI bus has been
granted.
(M) pin 24; (Q) pin 32
PERR# is used for reporting data parity errors on the PCI bus.
(M) pin 25; (Q) pin 33
SERR# is used for reporting address parity errors and other catastrophic system errors.
(M) pin 81; (Q) pin 109
INTA# is the level triggered interrupt pin dedicated to servicing internal device interrupt
sources.
(M) pin 83; (Q) pin 111
PCICLK is the PCI bus clock for timing all PCI transactions. All PCI synchronous signals are
generated and sampled relative to the rising edge of this clock.
(M) pin 82; (Q) pin 110
RST# is the PCI bus master reset.
(M) pin 73; (Q) pin 95
VDD5REF is the power connection pin for the 5 V PCI pseudo supply for the PCI bus drivers.
CrystalClear™ SoundFusion™ PCI Audio Accelerator
CS4610/11
DS241PP5