CS47014-CVZR CIRRUS [Cirrus Logic], CS47014-CVZR Datasheet - Page 16

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CS47014-CVZR

Manufacturer Part Number
CS47014-CVZR
Description
High Definition Audio Decoder DSP Family with Dual 32-bit DSP Engine Technology
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
CS4970x4 Data Sheet
32-bit High Definition Audio Decoder DSP Family
5.13 Switching Characteristics — Serial Control Port - I
16
SCP_CLK frequency
SCP_CLK low time
SCP_CLK high time
SCP_SCK rising to SCP_SDA rising or falling for START or STOP
condition
START condition to SCP_CLK falling
SCP_CLK falling to STOP condition
Bus free time between STOP and START conditions
Setup time SCP_SDA input valid to SCP_CLK rising
Hold time SCP_SDA input after SCP_CLK falling
SCP_CLK low to SCP_SDA out valid
SCP_BSY#
SCP_IRQ#
SCP_CLK
1. The specification f
SCP_SDA
the actual maximum speed of the communication port may be limited by the firmware application.
t
iicstscl
t
iicckcmd
1
iicck
t
Parameter
iicsu
indicates the maximum speed of the hardware. The system designer should be aware that
A6
0
t
Figure 5. Serial Control Port - I
iich
1
t
iicckh
t
iicckl
A0
6
Copyright 2009 Cirrus Logic
t
iicr
R/W
7
t
iicdov
ACK
8
t
iicf
2
MSB
C Slave Mode Timing
Symbol
t
iicckcmd
t
t
t
t
iicstscl
t
t
f
0
t
iicdov
iicckh
iicckl
iicstp
t
iicbft
iicck
iicsu
iich
2
1
C Master Mode
f
iicck
t
iicirqh
Min
1.25
1.25
1.25
1.25
100
2.5
20
3
6
-
-
LSB
7
t
iiccbsyl
ACK
Max
400
8
36
-
-
-
-
-
-
t
t
iicirql
iicstp
t
iicckcmd
Units
DS752PP8
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
t
iicbft

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