cx25840 Conexant Systems, Inc., cx25840 Datasheet - Page 121

• Manufacturer Part Number: cx25840
• Description: Video Decoder And Broadcast Audio
• Manufacturer: Conexant Systems, Inc.

CX25840/1/2/3 Data Sheet
3.24.5.1
Figure 3-36. AC_LINK Interface Timing Diagram
Figure 3-37. Slot Definitions
102284B
8/3/05
AC_BITCLK
AC_SDOUT
SYNC
SLOT
AC_SYNC
OUT
AC_SDIN
IN
TAG
TAG
0
STATUS
ADDR
AC_LINK digital serial interface. AC_LINK has been defined to support connections
between a single controller and up to four codecs. All digital audio and all control
(command/status) information are communicated over this serial interconnect, which
consists of a clock (AC_BITCLK), frame synchronization (AC_SYNC), serial data in
(AC_SDIN), and serial data out (AC_SDOUT). The AC_LINK interface can be
enabled through the ACLMSTR_BIT1 field in the ACL Control 0 (0x980) register.
AC_LINK Interface
The AC’97 controller signals synchronization of all the AC_LINK data transactions.
AC_SYNC, fixed at 48 kHz, is derived by dividing down the serial bit clock,
AC_BITCLK. AC_BITCLK, fixed at 12.288 MHz, provides the necessary clocking
granularity to support twelve 20-bit outgoing and incoming time slots. AC_LINK
serial data is transitioned on each rising edge of AC_BITCLK. The receiver of
AC_LINK data samples each serial bit on the falling edges of AC_BITCLK.
Figure 3-36
An AC_LINK frame is defined to begin one clock period after the rising edge of
AC_SYNC (i.e., at the rising edge of AC_BITCLK following the one at which
AC_SYNC transition from 0 to 1). The frame is divided into 13 slots, numbered 0
through 12, in the order in which they are transmitted (12 is last). The first slot (0) is
16 AC_BITCLK cycles long. The remaining 12 slots are each 20 AC_BITCLK cycles
long. The bit cycles within each slot are numbered from 15 to 0 (slot 0) or 19 to 0
(slots 1 through 12), again in the order in which they are transmitted (0 is last).
Figure 3-37
ADDR
CMD
1
STATUS
DATA
CMD
DATA
2
illustrates the link signals.
illustrates an AC_LINK frame.
LEFT
LEFT
PCM
PCM
3
RIGHT
RIGHT
PCM
PCM
4
Conexant
LINE1
LINE1
DAC
ADC
5
RSRVD RSRVD RSRVD RSRVD
ADC
MIC
6
RSRVD RSRVD RSRVD
7
8
9
LINE2
LINE2
DAC
ADC
10
Detailed Functional Description
SET DAC
SET ADC
HAND-
HAND-
11
STATUS
CTRL
GPIO
GPIO
12
102284_039
102284_040
3-95