C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 146
C509-L_97
Manufacturer Part Number
C509-L_97
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.C509-L_97.pdf
(290 pages)
- Current page: 146 of 290
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6.3.4.6.2 Capture Function of Registers CC10 to CC17
The capture function is selected by programming the direction register related to port 9 (DIR9). With
the direction bit of DIR9 = 1 the capture function at the corresponding port 9 pin is selected. Each
of the eight compare/capture registers CC10 to CC17 can be used to latch the current 16-bit value
of the compare timer 1 registers by a positive or a negative transition at the corresponding port 9 pin.
The bits located in the SFR CAFR are used to define selectively, whether a positive or a negative
transition at a port 9 pin forces a capture event. CAFR is a mapped register.and can only be
accessed when bit RMAP in SFR SYSCON is set.
Special Function Register CAFR (Mapped Address F7 H )
Bit
CAFR.7-0
The level at the corresponding port 9 pin is sampled every state within a machine cycle. For
example, with fosc = 16 MHz a state lasts for 62.5 ns. When the compare timer 1 input clock is
selected to fosc, the resulting resolution is 125 ns. The rise/fall time of the external capture signal
must be observed.
At a capture event with the CC10-CC17 register the corresponding interrupt request flag which is
located in SFR IRCON2 is set
Semiconductor Group
Bit No.
F7 H
Function
Capture on falling / rising edge selection bits
CAFR.x = 0 :
CAFR.x = 1 :
MSB
.7
7
.6
6
Capture into CC(10+x) on falling edge at pin P9.x is selected
(reset value)
Capture into CC(10+x) on rising edge at pin P9.x is selected.)
.5
5
.4
4
6-68
.3
3
On-Chip Peripheral Components
.2
2
.1
1
LSB
.0
0
Reset Value : 00 H
CAFR
1997-10-01
C509-L
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